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積體電路佈局工程師核心課程養成班的必要核心課程?

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發表於 2012-2-16 17:34:59 | 顯示全部樓層
招聘公司:one famous IC company
' m/ G6 d1 C; c! v% m$ A% ]招聘岗位:Sr. Layout Engineer# L! Z% k. P4 t8 Z* Q
工作地点:Shanghai  x5 d( e  e' y8 l9 ]
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岗位描述:
  d# ]- r7 I2 @/ s8 g8 y* C6 NJob Requirements: -Work with circuit designers to build physical design floor-plan; -Complete the physical layout design with the constraints of circuit design requirements; -Verify the physical layout design to meet both circuit design requirements and process requirements; -Use the advanced technologies to improve layout design quality and efficiency.
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职位要求:
  }/ N+ l) X( p3 a( I  CQualifications: -College degree (or above) in Electrical Engineering or other related engineering field; -At least 6 years experience in layout design field with rich tapeout experience; -Good understanding of basic electronic principles dealing with circuit and layout design; -Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout, Caliber physical verification; -Prefer experienced in PLL and IO design -Patient, A good team player, Good communication skills; -Can communicate with both written and spoken English.
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