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RF engineer's toghtest job function?

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1#
發表於 2011-7-19 18:21:58 | 顯示全部樓層 回帖獎勵 |倒序瀏覽 |閱讀模式
招聘公司:A famous IC company
: J, ?4 i  r  W# E* {  B招聘岗位:RF engineer  Y+ z6 R5 E8 E# B: K+ i9 x
工作地点:Shanghai
- O: \7 w' t% z( b/ ^. {( m1 E* ^* m( h! |
岗位描述:, U  x9 h8 I$ Q8 L7 d4 ?
Responsibilities 1. RF system design on schematic and PCB layout review, including critical component specification and part selection, RF chain margin calculation, device interconnection check, PCB EMI analysis and cross interference check. 2. Perform board level debug and testing including impedance matching (noise figure and gain for RX, power and efficiency for TX), device operating point optimization, RF calibration, 3GPP non-signaling/signaling testing target for GCF compliance. 3. Collaborate with core team engineers for specific issue logging, feedback, debugging and problem solving. 4. Provide technical support to customers and work with technical team and/or FAE for customer R&D projects.
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2#
 樓主| 發表於 2011-7-19 18:22:19 | 顯示全部樓層
职位要求:' r6 G9 A- t6 t6 b5 G/ j
Required skills and experience 1. 5~10 years experience in cellular radio system design or testing 2. Understanding of general RF and microwave principles including Smith Chart, multi-port S-parameter calculation, transmission line theory and impedance matching etc. 3. Knowledge of RF circuit analysis including filter design, noise figure calculation, amplifier (LNA/PA) design, oscillators and mixers, phase lock loop design etc. 4. A good knowledge in RF components, such as RF transceiver, SAW, duplexer, LNA and RF switch. 5. Experienced in lab hands-on test fixture and prototype making and impedance matching and tuning 6. Knowledge and experience in RFIC characterization and test, understand principles of RF calibrations and device optimization. 7. Experience and knowledge of GSM/GPRS/EDGE/WCDMA phone development process and RF performance DVT steps. Familiar with compliance tests for GCF/PTCRB 8. Familiar with RF testing equipments, CMU200, Agilent 8960, network analyzer, spectrum analyzer, and signal generator. 9. A good working attitude. 10. Excellent oral and written communications and interpersonal skills' able to function effectively in a team environment. 11. Master degree in Electrical Engineering with a specialization in telecommunications 12. Knowledge of RF system link budget calculation, wave propagation, antenna modeling and design is a plus.
1 y9 Q; f; B# G/ x# R6 C1 Y- u1 a4 E, i( L) m& n
能者與意者請email研發簡歷與chip123聯絡。
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3#
 樓主| 發表於 2011-7-28 13:59:08 | 顯示全部樓層
招聘公司:A famous IC company6 D4 N4 j9 V& _$ \8 ^
招聘岗位:RF Test and Application Engineering* T" K5 u/ [. m& C  b9 j6 R
工作地点:Shanghai8 O  U+ |) Z% K6 p" q

' e2 }( u: c* z岗位描述Job Description:
# d- ~* R: f- D3 A/ f7 f
0 a3 c: f. ~2 B+ b9 RYour role will support the RF test and Application of advanced wireless SOC products at the board level. The work will include RF test, RF application, significant automatic test (ATE) development, and offers an excellent opportunity to work with sophisticated SOC designs. You will be working closely with a team of Systems engineers, RFIC designers, ASIC engineers, and marketing personnel. Versatility is essential.2 z+ g/ Y% s* j- r5 Y, d" W- ?* J
Perform the RF test actions, such as RFIC test, RF system test and Platform test; Program the ATE with Visul Basic and Labview; Make test report and slides for team review; Platform design, bring up, trouble shooting and other application tasks if necessary.# l3 g) C2 Y) F0 z

) A. q0 _) H, I6 p+ t( Q职位要求:, f# X6 H5 Q* s3 I
Required Experience: }1 M* @3 F/ s! c' Z8 Z( E: `
- Bachelor of Science in Electrical Engineering (BSEE) or equivalent experience;* H- e2 ^' D6 e. p- n9 p
- RF test experience with board level, such as RFIC test, RF system test or Platform test are required;
* `% E* d, R8 U/ d" k- E- Program ATE with Visual Basic and Labview is required;
% [" t8 j& p" g; S& z/ l- Platform design, bringup, trouble shooting and Platform performance optimizing are perfered;
  O! q" h  X: K& a  w9 E- Good RF theory knowledge and a good understanding about RF parameters, such as NF, Gain, IP3, Hamonic Rejection are required;+ L1 J, E: @; p7 z
- RF circuit design and high digital circuit design (schematic & layout) is desired;
2 X: E, q* A' Z6 N* ~' l- Good team spirit and work altitude;
8 l7 I/ w( T  Y1 B4 M, w; l) ?- Good communication skills.
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4#
 樓主| 發表於 2013-5-15 15:32:28 | 顯示全部樓層
模拟电路设计工程师
. }% I1 C# u" E* F客户 A software agent company
3 W: j% q7 o) s# U) v地点 Shanghai
3 C% G6 P! v5 i) D4 \' g7 o! q' [
8 t' w/ o1 o3 B: Y  x( L职位描述
% u. |9 W! }* @( l$ X* o4 F负责模块电路设计
5 K7 I% p1 Y) K: ]$ K/ x" s" s% S+ B( ^  [# `
职位要求0 A' @8 C* H+ Y% N" V1 r
职位要求:  ?0 q9 f. F1 h: p& D, e& C
2-3年(硕士)或3-4年(本科)模拟电路工作经验及以上
& j  ?' b+ v- Q熟练掌握各种基本模拟电路模块设计
! M  l8 t7 p1 e, r% ], b! h有amp及高速接口设计经验的优先
% ~6 J' i' i3 V3 Y. b0 J3 |1 y5 B有高压ic 设计经验的优先
% C( L: R# I+ i8 b有power ic设计经验的优先 8 ?2 L# m$ p1 T
良好的团队合作能力
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5#
 樓主| 發表於 2013-5-15 15:50:43 | 顯示全部樓層
模拟信号IC设计工程师
% D& A( w, [% B% I# U2 h. ~* Q客户 A famous IC company
: z: A: B- L, x  P% n* y$ ?地点 Shanghai7 V$ t: W5 Y9 K% ?4 K8 s

8 d# t6 J$ {% g7 R职位描述:4 K1 {( {  f/ d# \" Y' F% P4 @
1, 负责模拟集成电路芯片的定义,开发和验证;3 D3 R8 |0 k" `& Q
2, 配合市场部完成项目初始定义,主导项目技术可行性研究和立项;% l4 Q- I2 l9 o
3, 根据产品定义和技术规范设计具体的电路架构,独立完成模拟电路设计、仿真、验证等工作;
; o5 N# C$ K5 k& E4, 规划版图布局,指导和协助layout工程师完成版图设计,确保版图达到电路设计的要求;
1 r0 Q# o6 T+ G5, 协助测试工程师制定测试规范和解决测试开发中的问题;4 Z2 b* u6 K3 [
6, 协助应用工程师,现场应用工程师解决客户及其他应用问题;
" E' _# M! Y3 r& B: b7, 对产品前后端环节进行负责和追踪;- y1 v% R1 _2 Z3 ~( K' C
8, 负责相关设计文档的撰写。
7 T" ~6 b) J0 c0 ~8 _  G5 f9 f9 Z2 m; X3 E1 \
任职要求:
9 z6 S; E) R  H. X& d0 g( b1, 微电子或电子工程相关专业本科以上学历,五年以上模拟IC开发经验,熟练掌握模拟电路IC设计方法;+ U, q) a, h. ?8 D0 B
2, 具备模拟芯片设计、仿真、布局、流片与测试经验,具备高速模拟电路流片经验优先;7 O* A1 d, w4 o/ J
3, 对半导体器件以及工艺流程有比较深入的了解
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6#
 樓主| 發表於 2013-5-17 14:37:53 | 顯示全部樓層
模拟信号IC设计工程师- J: n: J6 R5 ^5 D
客户 A famous IC company
8 F( _7 ?* R4 O& X8 ^地点 Shanghai, g" K; C6 |  D% i1 D. B& F

( d- c5 \4 n$ O% H4 T6 H9 S职位描述
- I' k' D. T& J! P7 M$ a职位描述:
! e" y) _8 }& W/ J# ]  V1, 负责模拟集成电路芯片的定义,开发和验证;- q4 B* r# b4 t9 l, N2 k
2, 配合市场部完成项目初始定义,主导项目技术可行性研究和立项;( e3 @" f% d/ W
3, 根据产品定义和技术规范设计具体的电路架构,独立完成模拟电路设计、仿真、验证等工作;3 H1 q$ \) G) K/ z6 v8 v
4, 规划版图布局,指导和协助layout工程师完成版图设计,确保版图达到电路设计的要求;/ y# i  E+ {9 Q. V
5, 协助测试工程师制定测试规范和解决测试开发中的问题;
" C7 v" n& f# z* t1 L$ e. Y6, 协助应用工程师,现场应用工程师解决客户及其他应用问题;
4 P9 {, d7 o! J8 }: \7, 对产品前后端环节进行负责和追踪;
9 i; E3 O4 w" r5 G8, 负责相关设计文档的撰写。1 C6 J1 o! A- ^

9 J4 g7 ]6 b  R: |6 u% A职位要求1 X8 o: w, S2 T; O: [9 ?& }
任职要求:
& D- H* D& V- S! R+ d9 x/ w% S1, 微电子或电子工程相关专业本科以上学历,五年以上模拟IC开发经验,熟练掌握模拟电路IC设计方法;
: \/ o" k' Z% z9 \2, 具备模拟芯片设计、仿真、布局、流片与测试经验,具备高速模拟电路流片经验优先;4 h: J+ V* Q" ^% D# Z
3, 对半导体器件以及工艺流程有比较深入的了解
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7#
 樓主| 發表於 2013-5-17 14:38:35 | 顯示全部樓層
process intergration device NVM flash memory NOR development
$ m3 i( h. F* t" o' R. o客户 A famous IC company0 w0 L$ y* J- y+ \# o
地点 Shanghai
" Q( e( ~! N1 f! ]2 H2 G: E9 {3 N+ Y- e( w) }6 ^5 R0 m
Job Description and Responsibilities:; e1 J: n4 r% B6 w5 J* J' r
Advanced embedded flash memory technology development, including cell definition, process integration, and cell optimization. Lead cross-functional, cross-organizational team to integrate embedded flash technology into foundries' and IDM's logic process. Act as technology interface to internal and external customers.$ r8 c/ _* Q5 V+ I$ o' t4 y
5 [+ [4 n4 {0 F7 v
Key Competency Requirements:4 _* {) v* S% i, C
Flash memory technology development experience.  g6 W3 f, a) s
In-depth semiconductor process and device knowledge.: u9 {  k) [& ~* K/ r1 k( m
Broad knowledge in IC development process, including CAD, circuit design, layout, TCAD simulation, device characterization, product testing, reliability, yield enhancement, and qualification.
- `5 \, ^+ j/ I* `; e$ h5 P- yDesign of experiments and statistical analysis.
% Y- ?0 ^* r! V1 g3 D! MStrong analytical, organizational, and communicational skills.
9 H1 I4 D6 [; `Demonstrated success in a fast-paced, multifunctional, and multicultural team.
; f% r1 k& Y4 [" y: Z) `  r6 {/ B. k; b* A" a& s' M
Education & Experience Required:0 a3 L1 B: {( h, s# n3 G
M. S. or Ph. D. in E.E., with at least 8 year of hands-on semiconductor technology development experiences.
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8#
 樓主| 發表於 2013-5-17 14:40:40 | 顯示全部樓層
Sr. Analog and Mixed-Signal Design Manager5 E1 Z! |+ Y/ r( p/ ?
客户 a high speed analog semiconductor company
  V. l+ o" p4 Y3 j$ q5 x* N) Y地点 Shanghai$ ~% ~) N# ~$ J9 M
& d+ |/ G  Q9 E8 z9 Y4 {* {- `
Responsibilities$ r9 [* g4 p+ r, a' n
Recruitment & manage a 3-5 analog and mixed-signal design engineers team in Shanghai7 B# w& K  e) o/ \$ j- I, Q1 A  e
Work with local digital SoC team and US Headquarter teams on:. X# [3 f( I" ^2 P' ^4 m) Y
1. cultural and technical methodology integrations( e; M/ D8 |/ p' v  Q6 c+ u$ I
2. design tool environment setup- C; Y$ h: _$ `; B( |+ k' K
3. training of engineering team members hired in Shanghai2 I$ q$ h) y! O: Z* Y* ^6 q
4. project definitions and planning
4 i& t* @+ a, e3 ^5. project executions
/ d' h; ]; H4 F0 b; P: T5 p! y) R: I4 K2 `# d0 m6 {1 d; G. F% V
Direct hands-on management of highly technical analog and mixed-signal engineering team
4 }# `6 f4 j( y0 a0 M Managing engineering team for successful execution of a analog and mixed-signal block/IP development& }+ A$ C. U/ s% W1 s* p
1. Definition: v' \* }% l- D4 G
2. Design1 A0 l8 j+ B- E: E' B
3. Pre-Silicon Verification2 {0 q) }: p3 q$ {9 g! H, s7 Q" ?
4. Post Silicon Validation& }  Q- o; Q0 b. E/ u7 g
5. Production
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9#
 樓主| 發表於 2013-5-17 14:41:11 | 顯示全部樓層
音频CODEC模拟 IC 设计工程师
2 P2 W2 p6 C: c" W4 B客户 A famous IC company
9 o9 `* ~  t2 O' C地点 Shanghai
$ c7 Y* |% w5 ~, i3 O" g' \4 T
5 X8 @& A  ~8 ]4 M. ^+ j岗位职责:% I% t9 P. v  |' S+ y# b
1. 定义,设计CODEC中模拟电路或其它混合信号IC,负责模块和整体芯片的仿真和验证( H; j. ~+ t( Q: s! `
2. 使用Matlab,CADENCE或MENTOR GRAPHICS等设计工具进行建模和模拟电路设计,仿真。2 a0 O. c' u! L( u8 ?8 @$ e1 V
3. 设计版图布局,并协助版图工程师进行版图设计,确保版图达到电路设计的要求, X1 {( F$ a7 O. H5 k3 s9 g
4. 计划实验室评估计划,并使用实验室测试设备对工程样片进行测试评估。
) |+ F! n( J' `" ~; \4 j5. 撰写设计,测试报告
! u( k! ?4 ~2 S6. 协助测试工程师进行中测和成测规范的定义和程序开发,验证# ]& }- s, Y  @+ V
4 n) m. l, s9 y6 ^) X
任职条件:+ Y% [! E- o; Y2 v, D% u+ G
1、 学历:6 c; u5 H; c) N* ?
a) 电子类专业
! m( o9 J, o) L! ]b) 硕士+至少3年相关工作经验# R: X% R- V! B
c) 本科+至少5年相关工作经验
% S) x6 Y  i- M' }2、 工作经历及技能要求
" \4 a# i1 U6 Y' e# la) 具备扎实的电子电路和晶体管的理论基础,掌握IC设计流程、方法及工具,熟悉集成电路制造过程和工艺。/ @4 ]3 C" m0 I3 O% d
b) 熟悉各种ADC和DAC的架构和设计要点,有完整的音频Codec中sigma Delta ADC和DAC设计以及成功流片的经验;
! L, y4 o1 U9 v/ zc) 熟练应用Matlab,Simulink,Cadence设计工具进行ADC建模和设计。" {- d6 U* m$ p5 c7 m
d) 精通模拟电路,特别是开关电容电路的基本原理,设计技巧及关键模块的性能参数。
  ], [8 T- C! C2 h$ x0 Oe) 具有良好的学习,分析和创新能力,良好理论与实际结合的能力,在电子电路方面有良好的悟性
* z' @4 u' s! ~* ef) 能熟练阅读英文资料并能用英文撰写技术规范,设计和测试报告。
% W* J% y. i& w$ vg) 负责,敬业,具有良好的团队合作能力
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10#
 樓主| 發表於 2013-5-23 15:34:26 | 顯示全部樓層
Sr System Manager! h4 W1 I0 t( v6 q% ^8 f1 z! k
公      司:NO.82-A famous IC company9 u" Z' p; w9 ]9 I6 J' z  ]
工作地点:上海
1 R& A4 g& P2 n" v3 l( N. C8 O6 {7 l* r2 a# R+ k- Z
Responsibilities ' m& ?/ j. ?/ P- E4 F' D3 W6 Y
1.Manage a team with functions of FPGA-based design prototyping, pre/post-silicon validation, engineering/testing board development, ARM cortex-M processors based firmware development ' |) o( t3 E6 S4 @
2.Communicate to management, other functional teams and customers in an multi-site, international environment ( R4 W8 X6 M5 T5 M  \8 [- V$ J
3.Hands-on knowledge in the system/board/firmware field and be able to help the team members
# O+ R' ]' _8 l9 t  N" }) `, \. V
Mandatory Skills
- y8 n6 Z' v/ D# T1.        Fluency in English (both Oral and writing) and communication skill is essential for this position % d$ J/ j5 P4 ~
2.        Good board design knowledge and experience in an IC engineering context
3 j: v, T% K& w+ g6 c' I( r3.        FPGA based emulation system and flow / H3 y) q9 f( s8 X2 a  k
4.        Embedded system and firmware
6 i$ G: X. [/ D; h  S+ N5.        Good understanding of computer interfaces and instrument control (USB, UART, GPIB etc)
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11#
 樓主| 發表於 2013-5-23 15:34:33 | 顯示全部樓層
Preferred Skills
! A& \! [) I% `: H" r- [1 B1.        Digital signal processing knowledge
7 t: [6 E% g! s; `; i% T2.        Algorithm development
) ?( @% [  m( Q0 f! |7 ^" W2 [3.        Product definition/Specification 9 D, l2 A. N# h7 E) c# m
4.        Analog/Mixed signal measurement and characterization
- ?; \$ v7 ~+ d5.        Smart meter design and application ) }8 W' B! D& f) J, \
7 S" E( Q! P$ o+ Y3 ]; B1 f4 S
Education
+ |: T' y' H( l  S* F, N; P7 c( v0 iMaster Degree of Electrical Engineering, Computer Science or Control system 7 I' p+ H6 P, y6 e# s- X7 w
* A  l4 E* O; U5 |
Experience
4 [& V+ h/ j, _& F9 W+ S1.10+ years of working experience in the high-tech industry. + U# o3 M. }6 {, K
2.At least 3 years of experience in an international company, or oversea working experience.
7 g7 H# K  x5 V3 d4 P2 p4 l3.At least 3 years of experience in a management or supervisor position 5 L4 {! i. a) [- \# }
4.Experience in embedded system development . u/ e+ K9 g8 ^( v
5.Experience in system validation
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12#
 樓主| 發表於 2013-8-16 13:31:17 | 顯示全部樓層
RF Systems Design Engineer
5 l# V5 R* ]* U* x" @( _& t. P1 O* P
公      司:a world leading RF MEMS company5 e# r# C$ @0 l+ H
工作地点:上海
/ X" Y# G( v. x8 U
9 Y2 k" r* t9 `, L* y职位描述- P/ _. X: O7 Z8 }
SUMMARY (of position): Systems Design Engineer responsible for strategic customer design & applications support, with primary emphasis on wireless handsets. The successful candidate will be responsible for supporting internal and external customers, providing on-site customer technical support, training and presentations, product benchmarking and advising customers on designing with ****’ products and helping solve any technical issues customer''s may encounter. Additional responsibilities include gaining feedback from customers for MRDs, and developing materials for technical seminars, application notes, trade journals and conferences. This role will involve travel. Candidates should possess a BSEE and MSEEE, and have experience with electromagnetic simulation tools such as, HFSS, CST, Sonnet or others and have experience with RF system simulation tools such as ADS or Designer. RF or microwave board level, layout and systems and RFIC design is a plus
* J1 d- H# y( ?' b6 r4 ~" x$ b/ B3 ?& y$ O! e/ H& A
ESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned.    K% X3 p4 r2 L5 v
- Must have current or prior experience as a cellular handset designer &/ or RF Applications Engineer  , u, C5 G, g# r( @9 q+ _
- Experience in Cellular Handsets:  
! a5 v4 T. Z& V8 K Overall system architecture design & applications  ( |# N7 T+ |/ r) X8 f' y- p
 FEMS  9 h& X3 o' B8 b4 L* B( _
 Antennas  $ ?* [' S/ Q" R# Y! v
 Power Amplifiers  / l( X8 X( s1 f% }
 Interface specifications (SPI, I2C, MIPI, RFFE, etc.)
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13#
 樓主| 發表於 2013-8-16 13:31:30 | 顯示全部樓層
- Experience in Antenna Design – familiarity with basic antenna types (PIFA, ILA, Loop, etc…)  & j8 [: Z9 A  _
- Ability to advise customers on the application of CK products for use in antenna Aperture Tuning and Impedance Matching
4 K  |1 t% V; G0 X0 g* h1 c" t& ]- Experience in RF Systems board design is a plus  
3 U7 o! s: J! [& f+ M- Ability to translate customer needs into actionable design requirements for **** Inc  
/ Z  e- c3 Z9 J$ _6 y  Q1 Q- Experience developing hardware & software tools and collateral for customer adoption  
3 i1 ?. F; H7 o- Reference design experience highly desired: GSM, EDGE, WCDMA, 3G, 4G, etc...  
! ?: l4 c: b/ s- Understanding of transmission line theory, electromagnetic theory, Smith Charts, & RF test equipment  
! |% k, V+ G% W7 x2 h4 [- Provide on-site technical support to customers including requirements analysis, design-in support, product trainings, performance evaluation and tuning, application and troubleshoot support, etc. 6 N2 D5 Z9 ?% m/ P
- Aggressive technical support in capturing new designs  
9 \. C5 G" G( k8 S1 A6 V- Collaborate with sales and marketing teams to penetrate strategic accounts and support marketing events. Provide customer/market insight to marketing & engineering/ product group in new product definition process. 7 @- x4 O2 \- A7 Y0 Q
- Track projects regularly, lead customer and internal communications, drive design-wins and resolution of issues.  ( t# D  k! h2 D5 e. ]/ t
- Good understanding of customers’ eco-systems, preferences, engagement and market trend.  
: I2 @2 F) t. F& L7 w* u; P, s. @" G- RF CMOS experience is a plus  
9 u0 @1 @& C" z% d7 B9 Z0 |9 B- Must be a self-starter and have excellent communication skills  5 a  V' I$ v( K6 x6 y$ K
- Proactive and highly self-motivated. Ability to work independently.  
+ f3 }: c  C4 I4 {! C3 R- Good learning agility and communication skills are required.  & u" V) V  ~) v" W3 {$ [" g
- Good command of spoken and written English and Mandarin  
' ^* F- u) J+ L- Travel will be required.
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14#
 樓主| 發表於 2013-8-16 13:31:33 | 顯示全部樓層
职位要求- S: X: _0 w& l: M+ \. B1 D
SUPERVISORY RESPONSIBILITIES Initially this role will have no supervisory responsibility. However, potential career promotion could rely on ability of ideal candidate to take on supervisory responsibilities in Applications, Marketing &/ or Sales.
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QUALIFICATIONS  3 l, Q' z6 h# n( v, [( C4 J& I
 10 years mobile terminal, RF component or front-end experience (or advanced degree)  8 f+ E% r4 @* ~3 ^$ s% ~0 \
 Cellular/ high volume CE design or applications experience  
0 c& A5 U: R+ m( t' B Ability to communicate effectively and efficiently   
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EDUCATION and/or EXPERIENCE  2 C4 _  y& A2 N/ @: D0 v9 F2 J% V
 Degrees preferred : BSEE (min); MSEE (preferred)  6 u5 }* r6 @( P6 u
 At least 10 years mobile terminal, RF component or front-end experience (or advanced degree)  
4 u7 p1 p' ~( m( ~ Familiar with cellular systems and standards (CDMA, GSM, EDGE, WCDMA, etc)  7 a* P, N# M' B$ T) B  U* y  w/ x
 Familiar with RF EDA tools such as ADS, HFSS or others, RF or microwave board level, systems or RFIC design. ) }6 x0 v6 q6 i. A! Y6 v9 h7 j
 Knowledge of cellular RF front-end architectures  
6 a" `" V$ ~! {, b! d" @ Understanding of various key interface specifications (SPI, I2C, MIPI, RFBus)  % F/ p4 w7 N0 W
7 u. t# p0 E8 L# U- ?4 {: I
  
" u1 }0 e, b' ?0 a# V# {
; z8 |2 l7 P) K$ w: bHARDWARE/SOFTWARE  
) {5 W8 D$ Y+ N2 }% l4 f8 HHardware experience to include RF/ analog component & systems  
. B: f7 u0 f9 v, Z% {* q4 lSoftware experience optional but desired  
# C% o& A2 k: L2 v9 ?RF design tool experience is desired (EDA tools such as ADS, HFSS or others, RF or microwave board level, systems and RFIC design). 7 N8 `' v# H2 p9 `* ^6 n
CERTIFICATES, LICENSES, REGISTRATIONS (Described or None)  
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2 w1 F1 o% ^; oNone  
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# ?# z+ `; ~8 GPHYSICAL DEMANDS - While performing the duties of this job, the employee is regularly required to sit and use hands to finger, handle, or feel. The employee frequently is required to talk or hear. The employee is occasionally required to stand and walk. Specific vision abilities required by this job include close vision, color vision, and ability to adjust focus. The employee is occasionally required to travel to customer sites in the US and abroad. 5 p  |' ?4 \  g! Q2 g

9 ]/ F) ^" P; i/ X+ F! x; W' {1 m: c9 AWORK ENVIRONMENT - The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. : P8 k' L( o2 R3 z- q

/ c4 W8 i% t2 \) M7 T0 LThe environment is that of a typical office or laboratory. The noise level in the work environment is usually quiet.
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15#
 樓主| 發表於 2014-3-6 14:37:57 | 顯示全部樓層
HardwareEngineer
4 Q9 H1 N0 z" t( b9 L& w公      司:A famous IC company8 G5 r0 u8 U1 x4 |/ Y
工作地点:上海
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$ C, ?% f# t( t/ ~* A/ C& v0 U3 s职位描述0 e; u& c  }6 n( {8 Z
1.Be responsible for hardware system design, discuss with chip designer, understanding their requirement and design the hardware system(schematic, PCB and C program) correspondingly
4 s& `3 P  O" U1 `* t$ \2. Testing the hardware system and provide test report
( B  Y. k; d) y3 W3. Debugging the system, discussing with chip designer and help chip designer debug the issues  
$ ]( F: _! [- b9 `
" g+ U* N  \4 O- W9 l1 X要求: ' ~! V% w+ `) q$ p. m+ W: r
1. B.S. in electrical engineering or equivalent is required . U, g. W' K8 L! e% B2 q
2. 2 or more years of PCB design experience is required
2 ]) _5 R. j  z6 w3. 2 or more years of C programming is required , G8 O6 P* g( |" O' |% A
4. DDR knowledge and testing experience is required
( q7 Z5 ?. X& t) Y6 e5. Experience of Xilinx/Altera FPGA is preferred
. ^1 K$ q+ U( x  y0 s2 i& m  O. M0 X6. Experience of embedded system is preferred
7 J) C2 ~+ g! \% c* f0 E7. Experience of using multimeter, waveform generator, oscilloscope is preferred  
4 ?& h$ L( |+ ~" i; D8. Verilog coding experience is preferred  & I% ?( C$ P+ p3 x
  ! \7 U# a# b6 @9 S: `# {9 [. U
PS:最好有 . DDR knowledge and testing experience is required
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16#
 樓主| 發表於 2014-3-7 13:13:45 | 顯示全部樓層
Staff Analog Design Engineer
1 l5 Y3 q$ @. A( P- d& P" C% Q* N公      司:one famous IC company
6 B, g4 ?, O! c, }( f1 T4 D* T5 J工作地点:上海0 b! F1 v5 E& _- s# q7 v$ b
* ^5 H4 x4 k9 d! e$ _
职位描述
4 O, m5 _! P4 Z$ @2 G/ K Work with analog and ASIC design team for new product development; ( S9 E6 \0 N! k
Work closely with layout designer for layout implementation  1 n8 V/ B' N$ K- g$ {) w7 g
Verification of performance requirements using appropriate simulation and verification tools. 9 `( t: `+ v5 D, F$ m, o4 L1 U
Support test & product team with chip debugging, failure analysis, characterizations and product release efforts
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2 O' e- g/ Z' y" K6 _4 l职位要求
2 r( a' k% b0 z7 g1 qQualification Requirements 3 ~5 s1 ~( |: A8 D1 A! x
Master degree or above in EE or related field;
9 q5 m( ~+ W# \5 E! h+ a 5+  years of experience on analog IC design area;
4 A" s( |2 U+ D+ Z. j Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system applicant
% y& }; D& _6 x- r; c Strong experience in certain analog blocks design, such as Serdes or sigma-delta AD/DA, Temperature Sensor.  ) u" W6 p0 ]: b# Z- A3 o: P
Familiar with CAD tools, such as schematic capture, SPICE simulator (or equivalent transistor level circuit simulator), Virtuoso and Matlab system building;: \* `! K, }$ r$ w5 b+ }& }
Understanding of CMOS process technologies and device physics / b* L: ]( J, J8 F6 c$ L2 C4 n1 L
Excellent English in speaking, reading and writing skill " ?$ e) u7 o) i3 |- P
Good communication skills and cooperative spirits.  
5 }) ~- c* T* z: | Outstanding ability of self-management / self-motivating and attain goal under pressure.
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17#
 樓主| 發表於 2014-3-7 13:14:59 | 顯示全部樓層
Staff/Senior Program Manager# J: e0 i# J' e' ]( k: @
公      司:A famous IC company" P+ C% h8 Z! d) I
工作地点:上海" k! c! @* A! I$ s* C0 Z/ `/ @
/ D: @* y+ ]( I/ T( J( p3 J+ P
Job Function
/ \3 Q! x1 `' b# e  }* YProgram Management (for Design & Development, New Product, Launch, and Sustaining IC Development) of chipsets / chip / IP-Technology
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Establish stable Plan of Record (POR): ensure roadmap/requirements baseline, project priorities, requirements change control, driving synchronization across several development teams, coordinate and synchronize external deliverables, and schedules among many world-wide design centers, etc.  % V: ^4 P$ y3 K; I, S+ Q+ u9 g

1 c' ?  a- d& R: fDrive planning/scheduling: develop the execution schedule to include staffing needs and interdependencies. Coordinates department schedules resources etc. and develops program master schedule, work plans, checklists, design reviews, and resource requirements.
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18#
 樓主| 發表於 2014-3-7 13:15:22 | 顯示全部樓層
Establish routine update & communications process: update status, schedule trends vs baseline, risk management, mitigation and recovery actions, etc. Develop program indicators to push information to internal customer teams and management, develop content and present at monthly program reviews. Partner with other functional areas to establish critical processes to support disciplined product development and decision making and to ensure quality. Interfaces with internal company departments, (contracts, legal, design and product engineering, manufacturing, technical publications, product support, etc.), to be aware of each departments work priorities, available resources etc. Interface with external ASIC, assembly, and test suppliers.
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, R5 _9 p* K# t8 N- S% g Coordination across multiple development sites will be required. This includes different Qualcomm sites as well as contractors, both domestic and international. International travel to other development and customer sites may also be required. Organizes and leads interdepartmental meetings (i.e. leads meetings with engineering, foundry, technical publications and/or product support), to set project milestones, define project tasks, establish program policies and processes and allocate resources.
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Responsibilities 8 e3 t  h  M# q& N
Responsible for establishing project milestones, definition of project tasks, establishing program policies and processes and allocation of resources.; k9 n# ]. n0 V% D/ ?3 O: {
: t- @: i9 S8 B2 a4 s
Delegates project assignments to internal departments where required. Develops control systems and methods to accurately monitor and measure program progress, identify potential problems for each internal department, identify risks, and to then develop and maintain risk matrix with mitigation and contingency strategies, monitor adherence to program master plans and schedules. Troubleshoots program issues and helps to develop alternative program tasks, schedules, milestones, processes etc. to resolve program issues.
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19#
 樓主| 發表於 2014-3-7 13:15:52 | 顯示全部樓層
Communicates project status, issues, and recommended mitigation plans to cross-functional core and executive teams. Participate in design reviews and coordinate or assure compliance to design or department checklists and procedures. May interface with customer or supplier directly on a regular basis throughout the life cycle of program.Position requiring knowledge in the areas of VLSI Design and Methodology, Packaging, Reliability, Fabrication, Product Development, and Sustaining IC Management.
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Skills/Experience
! A4 p7 v8 b, Z, [8+ year experience in related IC design and total product development with a later career emphasis on program management of those disciplines. Be able to multi-task with and understand/facilitate/guide a variety of disciplines such as IC design, CAD, modeling, fabrication, test and verification, product support, reliability, process control, scheduling, applications, and business/contracts.
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2 H7 D* c# E0 q! g1 f/ C: ^! [Self-starter. Ability to manage, influence, and set direction of multi-faceted, multi-disciplined teams and programs independently with minimal supervision. Business acumen required.
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20#
 樓主| 發表於 2014-3-7 13:16:01 | 顯示全部樓層
Candidates should have previous high volume, component-level, program management experience. Must have excellent written and verbal communication skills, interpersonal skills, and the ability to mentor and motivate project teams. & n" y. `) f+ j3 {  [
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Must be able to articulate vision and influence decision making and outcomes both within company and with external suppliers.
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Must have a "whatever-it-takes" attitude using diplomatic leadership skills within a collaborative teamwork environment to accomplish the necessary results. Must be prepared to help in whatever capacity is necessary for the success of the program.Sound judgment calls in day-to-day engineering and marketing decisions.
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) r9 i9 D2 _; d) u, K5 ZSelf-managing and team player with collaboration.
5 r/ D  ?6 |1 s. A
6 Y7 [7 i( _  iComputer proficient and literate
* u2 q* @, V# s6 U+ h1 |; L6 }$ GEducation Requirements       BS in EE/CS/CE or related field, MS/MBA a plus
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