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Device development engineer$ L: }8 s( L, l% T6 n* X8 J' Q& V
" |& l+ R9 X* O9 i6 d公 司:A famous IC company5 `2 p3 E# o3 e! W7 \
工作地点:上海# Y2 F5 j( ^1 o* v
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Duties
$ b! T$ P4 a" g+ {1 z· Facilitate product design work in foundry process(LG, MS and BCD process). ! J5 i+ E; Q( p% [0 r1 a% D9 u; K
· Have a strong device/process background for 90nm~0.18um logic process, mixed-signal, embedded FLASH memory, and BCD process. ; [7 k8 i3 m5 G, U( p) T
· Tasks would include answering device and process related questions, interpreting DRC and LVS results, helping with tapeout and mask ordering, doing jobview mask inspections, and also participate the process/device development projects. R* i3 C8 X1 \
· Would be expected to establish relationships with his technical peers at foundries and discuss important technical issues with them on an almost daily basis. $ x) V+ a, s5 S5 H( c+ h. }
9 A* a# n% P6 {! @0 m, \Requirements
# U3 b* ~4 A; R- y· Senior level engineer (minimum 8 years experience with BSEE or minimum 5 years experience with MSEE or PhD) - b+ k* {7 D { |" C
· Excellent device knowledge (LV CMOS, BJT, BCD, embedded FLASH memory, OTP/MTP, latchup, ESD, device reliability) ' q/ y1 d' f9 A7 W# o4 ~2 W6 \' B
· Excellent to very good knowledge of PDK systems (design rule, verification software, mask ordering, device pcells, circuit modeling, parasitic parameter extraction, and so on) 7 X: b! M* ^ o
· Some knowledge of circuit design, primarily from a device usage standpoint.
: F1 j z' l) C/ E( x· Knowledge of major Asian foundry systems, process technologies, and devices would be a positive.
- w% k" k# s7 i' ], z6 ?0 C· Ability to understand and solved technical problems relating to semiconductor devices with a minimal amount of guidance.
9 Y* ~) a" C0 S, W: v· Excellent people/communication skills |
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