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危機就是轉機?類比IC廠逆勢擴大徵求IC設計人才?你覺得去哪家最好?

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1#
發表於 2013-10-14 15:58:29 | 顯示全部樓層
Product Engineer -QA* {3 m# T6 x( o
公      司:A famous IC company, j( F9 y% R& ~3 q( n& v
工作地点:上海
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Position Summary:
; k0 I% a* I. {! Q) V% A& x, I9 rEssential Job Functions/Accountabilities:
& S3 m$ `' {2 O9 K, i: ?Work closely with RD and PE team to  2 T$ v5 m* n+ y( F! Y# o
Make sure product (software) quality 5 M5 ]8 _/ z! r+ j
QA system maintain and improvement $ a8 u+ k: E& k0 b+ r1 B+ M- }
Daily build and daily regression test
: I8 j+ V  m# g9 kProject management and risk control 6 @# o& l, O: X+ |5 I
Bug/enhancements verification and testing
! I" s6 `" E8 ?6 V+ NProduct release and documentation
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6 W3 h/ x0 p* iMinimum Requirements/Qualifications: 8 e2 g7 o) [1 ^' K$ Y) c
Strong scripting skill, Perl/TCL and LINUX shell required 3 B- X* ^$ t3 `+ m- N# I2 w
Experience of SPICE-based(HSPICE/Spectre/Eldo) circuit simulation - X; W: y( Q7 _9 l& R
Experience of package and PCB modeling and simulation with field solvers 4 I3 P  l- a( C! V
Knowledge of High-Speed I/O (DDR) power and signal integrity analysis * J( @5 N6 }) |4 Y
Knowledge on die and IO ring physical design, LEF/DEF/GDS is a plus
- ~! G+ t) t0 j/ tB.S. in Electrical Engineering or other related areas, 3 years of experience
/ H8 J" X# C, Y. h' n3 M- o) BM.S. or Ph.D. in Electrical Engineering or other related areas, 1 years of  experience, or equivalent combination of education and experience
* I4 r, U" r5 r2 KSelf motivation, teamwork and strong English communication skills ( both written and oral )
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2#
發表於 2013-10-14 15:59:08 | 顯示全部樓層
Sr. Software Engineer-电路仿真和建模
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公      司:A famous IC company3 K8 d& {. j; E
工作地点:上海
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Position Summary:  6 |/ p. \; [1 d& O' @- s
Software development and product engineering for power and signal integrity analysis and modeling   \# W8 s; _; W6 q0 g5 c# N
Essential Job Functions/Accountabilities:
3 D, r' h) |: v2 o+ G1 ^  h4 @Maintain the IC-package power and signal integrity modeling software, conduct bug fixing and enhancements; develop new features to expand the application and improve the accuracy, capacity and speed; perform development level testings and work with application engineering team to resolve customer issues;7 f. z8 z: N: p+ c7 w( D8 n5 q/ @

) V+ O. N- x; T  bMinimum Requirements/Qualifications: / f6 g- S; s  [* l. z; M) D+ R2 C; ]1 E
Strong experience in software development using C/C++ 4 h6 X. P/ }+ v0 C4 \3 B" A! k3 \
Strong working knowledge in linear and non-linear electric circuit network analysis and modeling # n. B5 E% r  d
Knowledge ofSPICE simulation, or on-die and package extraction is a plus / U9 y9 [4 G, I  U# c$ G5 s' J
Excellent communication (both written and verbal) skills in English
0 h" Y  @' T# e0 x0 e* P" WMS, Ph.D. in Electrical Engineering, Computer Science, Physics/Math or related fields
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3#
發表於 2014-3-6 14:39:01 | 顯示全部樓層
Product Engineer
; L! \) m% c/ H3 g7 j2 ]公      司:A famous IC company
6 i) U8 X9 C6 Q. S$ d" E$ `工作地点:上海) N4 Z7 d+ @. `# _
& |4 C. n4 r/ M* V. K, V
职位描述
: l) f; j. |- F5 r Ideal candidate will have completed BSEE , with 5 to 10 years experience in
+ V& j# ^6 x0 d; ?" {! A; hSemiconductor field.
5 X  ^; b. x; o( _5 l3 v+ Z
; h! z. y4 K8 d8 d, c4 @% u: b; w5 z Candidate should have strong oral and written communication skills -must be english speaking.
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! _- ~" P; O9 m! \  [+ g$ z Candidate must have demonstrated strength with analog circuits, and familiarity with typical lab equipment such as scopes, DVM’s, curve tracers, and function generators. Strong bench skills are mandatory.! E0 a" Y( p4 O) S

" K3 {& d1 o9 c Ideal candidate will also have ability to debug IC’s to component level from design schematics and plots.
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# Z, i2 v& J. ]& ?) z Failure analysis background is a plus. - C$ K% i8 O3 k# I; k

, V' j3 L  R6 F2 d  Q2 y4 }$ C6 `: ~ Candidate must also have ability to follow documented procedures, and must be able to work independently. Individual will report to management team in US.  z% \: W& t: d% K5 N1 {

2 i6 K3 m$ m  B7 z- ^. ~" Z Job function to cover all aspects of New Product Development and Yield management,including bench-to-tester correlation, tri-temp characterization using ATE equipment, trouble shooting and yield management
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4#
發表於 2014-4-28 11:01:12 | 顯示全部樓層
高速模拟集成电路设计工程师) s% V  D' u9 W, ?' q0 s1 m/ l/ p
公      司:A semiconductor company3 d' C2 t" B6 r6 S: b" w3 F$ u' h' ?
工作地点:上海
, [  A) f3 Y9 `; a% H
' F" X( Z. r: J& h职位描述:  
: O! g! D! g0 K: t6 M: [1、负责高速模拟电路的设计、开发、优化;  
  P6 h$ t8 Y/ A* w$ }$ k2、版图的设计及验证;  
' x$ h9 H8 M0 [- P3、电路版图参数的提取及后仿真;  9 k6 f" v( I1 a! S& Y- j* @8 _
4、芯片的测试和分析。& q* y& N5 H4 o" y( o$ b5 l) c$ c
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职位要求: 7 r5 C% p2 I' ]; K2 x; f; x
1)微电子、集成电路相关专业硕士或博士学位,或学士学位3年以上模拟IC设计经验;  $ O2 A- x5 p% M4 K- J- n& Y* \
2)熟悉和掌握模拟集成电路及版图设计的原理与技巧;  
: z  r6 R( }8 X4 o& w& ]3 V6 b9 r3)有通信系统用集成电路芯片设计和成功投片经验;  
. x/ R9 Y* ~' B" E4)善于沟通、工作踏实、责任心强,具有良好的团队协作精神;  
0 H1 @" I3 u  G& ~  u* N! K5)有下述项目经验者优先:高速锁相环(PLL),时钟数据恢复电路(CDR),调制驱动电路,宽带放大器,限幅放大器,跨阻放大器等;
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