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[好康相報] There's a career in Analog/Mixed-Signal? Where's A/MS Talent in Taiwan?

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21#
發表於 2011-9-8 10:59:13 | 顯示全部樓層
职位要求:# O* G3 \1 E, x0 J2 C7 l; j
Required Skills Experience and Skills Needed:
- ]) J6 V0 n8 c, {$ c/ V, R' r$ G- O2 Q. D4 ^2 C, q# M) n2 B
• Must have a strong academic background with 7+ years industry experience in at least one of the following areas: o Analog/Mixed-Signal: data converters, filters, analog building blocks o PLLs and frequency synthesis: integer-N and fractional-N PLLs, DLLs, crystal oscillators o RF: LNAs, mixers, filters, PAs, and microwave circuits 2 L9 Y+ `" v8 I7 M) ^
• Must have IC tapeout and productization experience, and should have hands-on experience leading the test and debug efforts for products. 5 ]+ L7 s; i* f. N3 h1 G) I
• Should have familiarity with wireless or wire-line communication standards and how high-level requirements translate to block-level specifications.   G" z/ f6 B  L
• Must have experience with industry-standard simulation and design tools, such as Spectre, Spectre RF, Virtuoso, and Matlab. Education/Training Needed:
% _2 c' I" `& g6 t0 T• Master of Science (w/ research thesis) or Ph.D. in Electrical Engineering.
1 M) }  d" [. z& ]5 i• 7+ years industry experience.
22#
發表於 2011-9-22 15:25:06 | 顯示全部樓層
招聘公司:A world leading analog&mixed-signal IC company
1 {+ P4 g4 D1 C: ~3 m7 z招聘岗位:Analog Design Engineer
. Y- G' j( l1 d工作地点:Shanghai  K, z: C5 V9 ?% C1 `

6 [" d5 j9 K) l" v9 p" F+ F8 D1 W岗位描述:
' v4 c0 Q1 M- R1 B, O$ x3 }Job Responsibilities · Research, definition, design, simulation, layout supervision, characterization and release to production of high-performance state of the art BICMOS, video integrated circuits. The integrated circuits will typically include the following blocks: · Video Amplifiers · DC-to-DC converters, LDOs, PORs · Interface Circuits –SPI, I2C, LVDS, … · Bandgaps and references · Voltage monitors · Analog-to-digital and digital-to-analog converters
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# o3 Y& ~0 U7 L: v) U: b: Q职位要求:
$ {+ m- o0 j6 X: A* T. qJob requirements · MSEE degree, with at least 3+ years of design experience. · Hands-on design experience with BiCMOS/CMOS mixed-voltage custom circuit designs · Must possess strong intuitive and analytical understanding of transistor-level design and simulation · Must understand placement and layout issues with respect to mixed-signal IC’s · Must be familiar with Cadence mixed signal design flow. · Good English communication skill
23#
發表於 2011-9-30 11:42:24 | 顯示全部樓層
招聘公司:A famous IC company
0 R( u+ f6 P6 j0 {3 b招聘岗位:Senior Analog/Mixed Signal Design Engineer& b7 S* L% a% K. q: F
工作地点:Shanghai
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岗位描述:9 w: @' ~) C4 s  x
Job Descriptions: 1. High speed interface circuit design (DDR, USB, SATA, etc.) and fundamental components ((a) PLL, DLL, ring/RC OSC, POR (b) SAR/pipeline/sigma-delta ADC, DAC (c) REG, LDO, LVD) 2. Be responsible for the schematic design and simulation 3. Instruct the layout designer to design the circuit layout
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职位要求:. h- {5 v, |7 V# U" E- t! c
Job Qualification 1. M.S. in Electrical engineering or equivalent is required 2. 2 or more years of analog circuit design experience 3. Experience of Spice simulation and mixed-signal simulation. 4. Strong physical layout knowledge and parasitic component understanding essential 5. Experience of high speed interface & fundamental circuit design is preferred 6. Process and device physics knowledge is preferred.
24#
發表於 2011-9-30 11:44:25 | 顯示全部樓層
招聘公司:A famous EMS company# z5 E2 b  J7 f! K0 g, t
招聘岗位:Product Quality Engineer4 }; W& O) q4 |2 ^8 Q
工作地点:Shanghai0 {' h6 _) Q7 O1 U: x
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岗位描述:
" F" E7 _3 p1 PSUMMARY The successful candidate is a person who will lead by example a group of technical people that form the product development, product validation, manufacturing launch and mass production of various products. This person will also be successful in leading people who report to others. Key attributes of this person are – strong work ethic, attention to details, assessment of risk, absolute focus on Customer Satisfaction and product liability. ESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned.
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DEVELOPMENT PHASE
; h. l! I' G+ q1 K• Execute audits of design projects for compliance to the Product Creation Process
: O& U. U0 x0 G: o* i* M• Ensure that product / project risk is being identified and managed, escalate when it is not
; R! H/ B( d+ ]* O• Facilitate milestone check list
; y1 Z. E' n- m( L" ~• Facilitate the creation of the “Project Quality Plan” from the input of the engineering team 8 W$ X5 W6 k4 {! d0 ]+ I
• Manage DFMEAs • Identify, correct and escalate issues that may increase product level RISK to Company. This includes product Safety, Product Quality and Reliability, and Customer Satisfaction MANUFACTURING PHASE
25#
發表於 2011-9-30 11:44:31 | 顯示全部樓層
• Assist in the manufacturing launch and train key workcell personnel
+ }3 t( ]- w) S• Review other key metrics – supplier issues, manufacturing yields and fall-out, component failures, On-going Reliability test results, field failures and customer complaints to assess and quantify the RISK
! H& S# o) q. i  m% \- H• Continually identify and reduce the RISK
7 m$ P3 k6 S9 m/ l7 Q( t# m• Be the conduit for sustaining engineering requests KEY ATTRIBUTTES
) v9 x1 p& t2 R) s1 ?4 i1 @• Self motivated % T6 c; L- b  {# r/ Q. y
• Work independently
) O' s5 A  [8 R6 ^4 ]( V( I# m5 Q• Focus on Customer Satisfaction* f5 R. ]! p6 U) ]  g+ \6 q
• Attention to Details) c. C: l- `1 U. W- }1 K3 n/ Y
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职位要求:! L6 _7 y) ~# u7 s9 h9 A2 N3 p/ C* i
MINIMUM REQUIREMENTS • BS in Engineering • Quality Certification • Expertise in DOE, SPC, xFMEA, gage R&R, Project Audits, 8D, and other ASQ and 6-sigma principles • Understand and use Agile and SAP LANGUAGE SKILLS Ability to read, analyze, and interpret general business periodicals, professional journals, technical procedures, or governmental regulations. Ability to write reports, business correspondence, and procedure manuals. Ability to effectively present information and respond to questions from groups of managers, clients, customers, and the general public.
26#
發表於 2011-9-30 11:45:56 | 顯示全部樓層
招聘公司:A famous IC company
$ k# u7 x8 ~' Y  `& u) S1 W( i0 j招聘岗位:Application Engineer2 t& @0 ^% b5 `: {, ]3 K# m
工作地点:Beijing
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岗位描述:8 s" \: x/ n2 d& `, v8 C
Responsibilities: Providing technical support to customers of **** Design Solutions in Singapore(Malaysia)which include: - Providing Silicon Integrity consultation and implementing tape-out signoff for customers'projects. - Providing technical support and presentation in the pre-sale engagement - Providing post-sale flow setup and customer training Driving project-based flow support initiative including customer communications,requirements definition and schedule planning as well as project management and execution. Interacting cross-functionally with worldwide **** teams including sales, R&D and production
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职位要求:
9 t/ L# ?1 q, j6 [Qualifications: Knowledge in VLSI designs and electronic circuits Experience in back-end place and route design flow. Experience or having some knowledge in front-end RTL coding Experience in using EDA tools in some of the following areas: - LEF, DEF, GDSII - Liberty, Static Timing Analysis - Parasitic Extraction, SPEF/DSPF - Spice simulation Computer programming skills using Perl or TCL. Good communication and problem solving skills. Team oriented with a desire to learn. Able to work independently at various levels of sophistication M.S.E.E. or above. Must have at least 3-year related working experience Competitive salary
27#
發表於 2011-10-12 10:37:38 | 顯示全部樓層
招聘公司:A famous EMS company
. w( C5 f8 T7 E4 {6 x/ ~1 j0 `6 A招聘岗位:DAE Lead Engineer
' e/ W" B/ o+ z$ c/ s% d工作地点:Shanghai0 D  S* y' K* w+ G$ S  n$ o3 q

' w6 d* r. S' B; @# `# k岗位描述:
" S% b& ~) @% G. S6 BSUMMARY Take the major responsibility for analyzing the technical specifications and system electrical requirements to determine the best approach and feasibility of accomplishment within time, resource, and cost constraints for Server and Storage projects from an EMI, SI, safety, and electrical routing design perspective. Provide necessary inputs to general electrical designers for design quality assurance. Drive innovation and continuous improvement within the company by harnessing new technologies and methodologies. Provide exceptional support to external and internal customers, team members, and other persons through technical project cooperation. ESSENTIAL DUTIES AND RESPONSIBILITIES include, but are not limited to the following:
28#
發表於 2011-10-12 10:38:01 | 顯示全部樓層
Recruit and interview engineering staff. 1 U2 D' E; c; X1 P
Assist in identifying individual and team strengths and development needs on an ongoing basis in support of management of the DAE team. 9 D. L" ^# q9 }4 [) k
Propose ideas for training curriculum in area of responsibility for junior engineers.
0 b( t! ^1 f) y& a& K# uCoach and mentor junior team members to deliver excellence to every internal and external customer.  r7 Q8 ~/ c, x7 G# T
Support strong exchange of ideas and information with the customer, within the department, between departments, and between global sites.
" ?0 u3 B) k  e- [Organize verbal and written ideas clearly and use an appropriate business style.   k9 J/ m! t" ?. D. S; L
Ask questions; encourage input and feedback from team members.
5 v+ i; r8 M; `* _4 w* f( w6 sResponsible for the overall Signal integrity design and quality assurance.
' [1 a/ \  F' |, a% HLead the system level’s signal integrity & timing analysis and consultant training to the team staffs.
# ]% L" k+ ~" `1 P: k1 J$ iLead and correlate SI simulations with SPIT measurements to validate the modeling methodology.
: ]0 T  H0 G9 mLead EMC/EMI/safety design and analysis for design projects.
7 H# ?0 @1 g7 I7 w3 Y+ dMake the optimized design trade-offs and evaluation of mechanical, electrical, and thermal performance of both components level and system level
29#
發表於 2011-10-12 10:39:07 | 顯示全部樓層
Assure that procedures and work instructions are efficient and not redundant.
9 X4 S8 B$ P3 ]& sDemonstrate a commitment to customer service; anticipate, meet and exceed expectations by solving problems quickly and effectively; making customer issues a priority. Solve practical problems and deal with a variety of situations where only limited standardization exists. $ D: @# n2 L$ g; r- q
Ability to work effectively under pressure with constantly changing priorities and deadlines. , F, a& j! r4 G& G
Perform independent research and engineering studies 6 j- f7 D- j5 Z: Z
Comply and follow all procedures within the company security policy.
2 T* P$ h& x: {# K$ u: @1 ^2 TAdhere to all safety and health rules and regulations associated with this position and as directed by supervisor.
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职位要求:% \- V& Y# H! B9 f" V
Person Background: Bachelor or Master of Science in Electrical Engineering, Systems Engineering, Computer Engineering or Computer Science (MS preferred) 10 years computing related system design experience and 7+ years experience in Server or Storage system design will be required. Excellent computing, storage architecture and related design experience. Full understanding of system design process and whole life cycle of product. Experience on high-speed circuit design, multi-board, high-speed series difference pair topology simulation and eye-diagram analysis. Proficient with board level’s reflection, x-talk, ground bounce, bypassing techniques for power/ground noise reduction, termination techniques for reflection noise control. Proficient with PCB cross-section design and trade-off, SERDES channel analysis and PCB stack-up calculation Proficient with CAD tools such as SpectreQuest, Hspice and ANSOFT Designer is a plus. 0 H& a' o2 U( X. b2 H6 v1 W

! x0 x8 u; w0 R+ A# @& f3 c  d2 {( }9 T8 O7 sProficient lab experience in testing and characterization with tools such as TDR, Logic analyzer, spectrum analyzer, oscilloscopes, skew/phase noise measurements and good lab debug skills is a plus. Familiar with PCIE gen1/2/3, DDR 1/2/3/4, Infiniband, QPI, SAS, FC and USB signaling for scope analysis and high speed bus timing and integrity analysis and simulation. Strong EMC/EMI/Safety design knowledge. Excellent communication skills and sense of urgency in multinational and multisite working environment. Self-motivated and capable of working with a minimum of supervision in a dynamic team environment.
30#
發表於 2011-10-12 10:39:14 | 顯示全部樓層
Proficiency Level Written and Verbal English Skills LANGUAGE SKILLS Ability to read, analyze, interpret and communicate regarding common scientific and/or technical journals, financial reports, and legal documents. Ability to respond to common inquiries or complaints from customers, regulatory agencies, or members of the business community.
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: y+ ^/ h9 M+ W0 GAbility to effectively present information to management, customers, and supporting teams. Advanced PC skills, including training and knowledge of company’s software packages. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistical inference, and fundamentals of plane and solid geometry and trigonometry. Ability to apply concepts such as fractions, percentages, ratios, and proportions to practical situations.
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# q/ r# Y% _1 y; I7 `REASONING ABILITY Ability to define problems, collect data, establish facts, and draw valid conclusions. Ability to interpret an extensive variety of technical instructions in mathematical or diagram form and deal with several abstract and concrete variables. Ability develop mathematical models of physical reality and solve them, then implement the results. ' ]: B- k* c- \! A" \6 L6 }

- h9 A/ g- M( V. L4 x( ^PHYSICAL DEMANDS The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. The employee is frequently required to walk and occasionally lift and carry PC’s/test equipment weighing up to 50lbs. Specific vision abilities required by this job include close vision and use of computer monitor screens a great deal of time. 9 ?4 Y: A3 I  e* a! N

8 O; L% [8 v3 ^6 y! |WORK ENVIRONMENT The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Individual’s primary workstation is located in the office area, with some time spent each day on the manufacturing floor. The noise level in this environment ranges from low to moderate.
31#
發表於 2011-10-25 16:17:03 | 顯示全部樓層
招聘公司:A famous IC company. A5 c) ^) q) v3 M0 C3 B5 |
招聘岗位:Smart Phone System Architect* y, T* X& X+ _2 C& N0 J7 l2 K
工作地点:Beijing
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岗位描述:
1 _; t, {" {* g) Y' F( ~Job Description Applicants should expect to become responsible for the top-level system design meeting product requirements. We ensure that all parts of the platform are designed to operate together. This includes areas such as: security and boot, trace and debug, data communication, multimedia, cellular, power saving, energy and system management, and frequency management. You will work in a team with highly skilled engineers that together carry out the system design of the entire platform. You will be working with architecture choices and system design for platform services. The focus will be on how different domains interact to deliver complete functional use cases. 1. The job involves analysis and break down of requirements, developing architecture specifications, partitioning into modules, definition of interfaces (software-hardware abstraction layer), as well as core system investigations. 2. The work will be carried out in system projects that support the main platform programs. 3. The job also includes close interaction with customers including system architecture presentations.
32#
發表於 2011-10-25 16:17:10 | 顯示全部樓層
职位要求:* a5 ?  B( ?6 K) Z* H
Job Qualification Qualification (formal education needed): M.Sc. in Electrical Engineering/Computer Science or equivalent Requested competence: 1. A broad general technical knowledge within areas relevant to mobile communication platforms, with a special focus on one or more platform services such as security, boot, trace, debug, data communication, power saving, energy and frequency management. 2. Experience and understanding of embedded systems with respect to SoC and SW implementation and performance aspects 3. You will have extensive system design experience and have the capability to solve the whole problem rather than focussing on one detailed aspect 4. Experience of leading as well as executing technical project work as a member of a small team 5. Good communication skills 6. Quality documentation & status reporting 7. The ability to manage workload to deliver results on time
33#
發表於 2011-10-25 16:18:26 | 顯示全部樓層
招聘公司:A Fabless IC design Company
- Z3 s1 k& s# ]9 W" h* M招聘岗位:RF IC Design Engineer0 w7 B$ b3 E! }
工作地点:Suzhou
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3 x  t+ Z, m- V7 _/ W. I+ b+ G* X, X岗位描述:
$ ]3 x, f* x+ b0 A, h9 S' X9 O职位描述: 1、参与设计基于CMOS工艺的无线接收、发射系统,实现一个或多个射频模块如LNA, Mixer, VGA, PA等。 2、进行后端版图开发,参数提取并后仿验证。 3、使用实验室测试设备对工程样片进行特性评价、系统调试。
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职位要求:
0 f: ~- l+ o% W( F9 p# d  B8 w任职要求: 1、微电子、电子工程、通信等电子类相关专业,硕士或本科三年以上RF设计工作经验。 2、深入理解射频通信电路各种模块工作原理及性能指标,熟练掌握高频电子电路设计,如LNA、 Mixer、VGA、VCO、PLL中的一种电路等。 3、熟悉RF设计中的仿真、版图设计必需的EDA工具如ADS,Cadence。 4、良好的英文读、写能力。 5、具有良好人际沟通能力、主动性及团队合作精神。
34#
發表於 2011-11-2 13:49:59 | 顯示全部樓層
招聘公司:A famous European IC company
" I# m* C, r1 u9 q: U) L3 e招聘岗位:Senior Design Engineer Integrated Circuits & Systems# ^& @( A7 S5 i5 I* e
工作地点:Shanghai
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! x; f5 p  z: t: y' @岗位描述:
; b& j: o7 f/ w2 U; Q. ~; sRoles and responsibilities - feasibility studies of circuits and systems (incl. HW design) - support product proposal and definition - analog IP and subsystem design and verification - top-/systemlevel verification - IC evaluation/debugging - test proposal and support transfer to production - plan and track project activities - coach junior engineers( G1 `0 Q  y* ~3 H- L4 f# j
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职位要求:
3 i: C$ r  W+ B+ a) u4 S- q8 GRequirements - master degree in microelectronic circuits or systems - > 5ys experience in Automotive Smart Power Design - good understanding of ASIC analog and mixed signal flow (Cadence based) - strong background in analog smart power design - experience in toplevel integration/verification - hands-on experience in silicon evaluation and debugging - very good communication skills - foreign languages: English, German (not a must)
35#
發表於 2011-11-2 13:50:49 | 顯示全部樓層
招聘公司:A famous European IC company* V" x. D1 f- `' \# {3 L. p/ [
招聘岗位:Senior Specialist Integrated Circuits & Systems
/ i) B% d: {* u! |) P# e2 F# U工作地点:Shanghai
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( d+ g! P0 p8 I( ]7 P岗位描述:
& _% R4 Z! c4 h! u- R( t* bRoles and responsibilities - define system partitioning of s/c circuits and system - define HW/SW co-partitioning - provide technical feasibilities based on system simulation and/or FPGA based demonstrator - propose new technical solutions on s/c and system level - develop digital part of mixed signal ASICs - coach junior engineers
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职位要求:
% F! |7 u, @/ W/ aRequirements - master degree in microelectronic circuits or systems - > 5ys experience in Automotive Smart Power Design - good understanding of ASIC mixed signal flow (Cadence based) - strong background in HDL coding, verification and toplevel integration - good understanding of communication interfaces used in Automotive (CAN, LIN, Flexray, SPI) - experience in FPGA development - very good communication skills - foreign languages: English, German (not a must)
36#
發表於 2011-11-4 17:33:52 | 顯示全部樓層
招聘公司:A famous IC company; |4 R2 D; l( `+ {! R5 u. f8 S
招聘岗位:Staff PDE (Process Dev. Engineering) Engineer/ W: a8 U, F) @. E
工作地点:Suzhou/ L/ r$ p+ o9 j8 A
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职位要求:
! \- [; K. ^+ zQualifications Experienced years : Longer than 15 years preferred in wire bond process with longer than 10 years preferred in die attach process Experienced areas : Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond, Cu wire bond Experienced jobs : Leadframe design guideline, Understanding of materials (Leadframe, Solder, Flux, DBC, Wire), Understanding of relation between manufacturability and reliability by POR (Process of record) and BOM (Bill of material), Equipment set-up/maintenance, process/equipment/material troubleshooting and control, purchase spec/selection guideline and qualification for equipment and material Experienced packages : Power discrete (like TO220, D-Pak, QFN) and Power module packages (like SPM, IPM, IGBT/Diode module) Nationality : Local Chinese is preferred Education: 4yrs college or university preferred . Skills: Communication skills, Fluent with written English and speaking. Min level 4 and recommended 6. Other characteristics such as personal characteristics : Self motivated, independent, open mind to communicate, be willing to take risk  9 B5 h1 R  K" @9 t, c$ t5 F
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岗位描述:# M! j1 ?6 O% M; z
Job Purpose To get higher quality level of NPI, to get robust PKG NPI based on DFM (Design For Manufacturing) and to support any production related issues, high skilled and experienced FOL (Front of Line) related engineer with minimum 15years in the industry are needed with high skill of FOL related process machines and its understanding, technology, handling and maintenance knowledge.
37#
發表於 2011-11-4 17:33:58 | 顯示全部樓層
Duties and Responsibilities ! X0 }' J* s# Z, h& \( G9 d4 }; S
1. Responsible for PKG NPI Process Set-up (including cost reduction, new material development and new process development) in the area of Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond and Cu wire bond.
5 g$ u: i$ ?. ?2. Responsible for process characterization and improve process capability based on 6sigma process capability.
2 p) G/ P- r# a' P# z  F% g1 b3. Responsible for co-work and hands over to process engineering on process set-up results according to APQP procedure based 6sigma process capability. % H; w; J1 h; j' T
4. Responsible new process equipment selection and evaluation to communicate with equipment engineering with right comparison of COO : ?( u  f. ]7 @! y# W# e1 P0 ^: d/ j
5. Benchmarking one new process and new Process Development that does not exist and outside design Rule by Co-work with Dev. Engineer and process engineers
( V8 u: H. E# x; d9 @: X3 b9 L) @6. Conduct PA work following Advanced Product Qualification Plan (APQP) Spec, FSC-QAR-0013. 5 p* Y- j8 N- i. W' |3 J+ R; E6 l6 l; ^
7. Responsible for deliberative package development, Major Tool Change (Mold die etc) to improve quality and In-sourcing project that is new 0 j# W: T* D+ F2 \& J
8. Holding technical leadership for process development working with project members such like Industrial Engineering, SCM, Purchasing, Process Engineering, QA, Program management, Human resource, Facility, and manufacturing. ' R( B" S5 _5 C
9. Study and understand customer requirements, application, EHS and design those things to the process development.
0 h& A! t8 O( S% g10. Supporting development engineers to generate and create documents deliverables such as control plan, process FMEA, LAR plan, project charter, Quality function development, project schedule, line certification plan, to identify process development cost, etc. ; c7 q' f6 Y9 V  D
11. To plan and execute process optimization, failure analysis, process characterization, samples build for the development.
' ]9 i; B8 M7 ?; E6 N* N6 M12. To lead project team members related with process development. $ M# S' E9 o" ~* z$ _/ l
13. To find technical and systematic solution for failures of reliability, quality, manufacturability, cost, and cycle time that are related with process. 14. Track team member performance and report to origination manager : i' L0 E4 s1 h  m0 u1 [& K9 Z
15. To share and update project progress, risk of delay, constraints, weekly at designated day with stakeholders, project team, sponsors.
38#
發表於 2011-11-8 14:26:14 | 顯示全部樓層
招聘公司:A famous IC company
3 V  _: N# @0 e1 d- S招聘岗位:Staff PDE (Process Dev. Engineering) Engineer  C! E+ G7 ]$ ~( I1 |
工作地点:Suzhou$ ^& i# J$ z8 ?3 N
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职位要求:
% ^" q7 A" c: [2 n% e$ _/ ~Qualifications Experienced years : Longer than 15 years preferred in wire bond process with longer than 10 years preferred in die attach process Experienced areas : Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond, Cu wire bond Experienced jobs : Leadframe design guideline, Understanding of materials (Leadframe, Solder, Flux, DBC, Wire), Understanding of relation between manufacturability and reliability by POR (Process of record) and BOM (Bill of material), Equipment set-up/maintenance, process/equipment/material troubleshooting and control, purchase spec/selection guideline and qualification for equipment and material Experienced packages : Power discrete (like TO220, D-Pak, QFN) and Power module packages (like SPM, IPM, IGBT/Diode module) Nationality : Local Chinese is preferred Education: 4yrs college or university preferred . Skills: Communication skills, Fluent with written English and speaking. Min level 4 and recommended 6. Other characteristics such as personal characteristics : Self motivated, independent, open mind to communicate, be willing to take risk  * \8 G* U  y+ Y* h7 @/ W8 \- [- M

8 G7 C' ^+ R; m  v/ Z岗位描述:
, o3 l' i" b7 |  e$ XJob Purpose To get higher quality level of NPI, to get robust PKG NPI based on DFM (Design For Manufacturing) and to support any production related issues, high skilled and experienced FOL (Front of Line) related engineer with minimum 15years in the industry are needed with high skill of FOL related process machines and its understanding, technology, handling and maintenance knowledge.
39#
發表於 2011-11-8 14:26:20 | 顯示全部樓層
Duties and Responsibilities
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1. Responsible for PKG NPI Process Set-up (including cost reduction, new material development and new process development) in the area of Solder die attach (soft solder die attach, paste solder die attach, epoxy die attach), Reflow soldering and cleaning, Heavy Al wire bond (5-20 mils wire) , Au wire bond and Cu wire bond. 5 L" R; k0 Y" @
2. Responsible for process characterization and improve process capability based on 6sigma process capability.
3 A+ h" Y' l8 w7 |( F3. Responsible for co-work and hands over to process engineering on process set-up results according to APQP procedure based 6sigma process capability. 9 _& L1 ]; a+ ^/ V9 ~
4. Responsible new process equipment selection and evaluation to communicate with equipment engineering with right comparison of COO   t, B* a$ X  T& v, ^7 B  N8 R
5. Benchmarking one new process and new Process Development that does not exist and outside design Rule by Co-work with Dev. Engineer and process engineers 6 Z. x6 }4 N9 T% U9 m
6. Conduct PA work following Advanced Product Qualification Plan (APQP) Spec, FSC-QAR-0013.
/ O. ?% o& a; t. ^# }: D  q7 K7. Responsible for deliberative package development, Major Tool Change (Mold die etc) to improve quality and In-sourcing project that is new
3 x4 x2 x. P% h* V8 O' g$ }1 j9 t8. Holding technical leadership for process development working with project members such like Industrial Engineering, SCM, Purchasing, Process Engineering, QA, Program management, Human resource, Facility, and manufacturing. 5 f7 p8 F& n, Q& W
9. Study and understand customer requirements, application, EHS and design those things to the process development.
# p! N/ l' C- K6 I10. Supporting development engineers to generate and create documents deliverables such as control plan, process FMEA, LAR plan, project charter, Quality function development, project schedule, line certification plan, to identify process development cost, etc. & ^# f% [2 C( F# {; P& D' O
11. To plan and execute process optimization, failure analysis, process characterization, samples build for the development. 0 F- w* K. h/ g: |/ j/ ^
12. To lead project team members related with process development.
5 x6 U/ Z( |  i0 {0 A. J2 |4 k13. To find technical and systematic solution for failures of reliability, quality, manufacturability, cost, and cycle time that are related with process. 14. Track team member performance and report to origination manager / S  L" G/ L$ J6 j+ k
15. To share and update project progress, risk of delay, constraints, weekly at designated day with stakeholders, project team, sponsors.
40#
發表於 2011-11-23 16:57:03 | 顯示全部樓層
招聘公司:A famous IC company0 E* ^' o3 j$ L9 v4 h& F" A
招聘岗位:Sr. Staff engineer, Analog/mixed signal IC design (wireless team). }) G, S1 ?$ l5 c( L3 z+ P& l
工作地点:Shanghai& C. |/ U+ R1 e9 N. a) ?
( a: `; t: z% T' ]- ^& _1 z
岗位描述:
0 t, x- y9 C# y+ S3 C- M* `+ vJob Description: Our mixed-signal team develops cutting edge technology for the wireless product line. We are actively seeking talented analog design engineers who want to join a dynamic and experienced team and take their technical knowledge to the next level. This job involves working closely with US team in developing and eventually supporting the production of next generation sub-micron mixed-signal blocks.
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