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Senior Physical Design Engineer
; I6 S' S/ M1 G( P! r公 司:A famous IC company/ u8 h }5 Z: o( | J( H
工作地点:南京
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Key Responsibilities 0 t. ~. k6 ^+ v+ T; Z
Depending on experience, key responsibilities will involve some of the following: * n: K! J8 F, I A+ c& M' l) c
IC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification. 1 b+ I1 Z: L, w+ K
As a key member of physical design team, your will work on one of most advanced and the most complex chip designed. 2 C {8 ~, D! ]; Y
Leading a team of physical design engineers and resolving the technical related issues.
! k1 u; e6 Y; X7 ICrosstalk analysis, power analysis, and static timing analysis.
" M9 Y: h) S' Q% UWrite scripts in Tcl to improve productivity.
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: k, f2 w2 }+ j5 B, I ~Experience: 5+ years in physical implementation engineering 2 M3 S/ P% b. ]" K9 d* [
5 f0 _ m: L% |0 F) r* |Essential skills 7 ^1 i+ B' [' K9 l# w {
MS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
& j& }- O: i/ hExperience with Magma or Synopsys place-and-route tool set and physical design project implementation. ; M* e( h" E/ B. ^
Good programming skill. Capable of writing Tcl or Perl. ) e* ?# y8 h9 Q; x
Familiar with synthesis, static timing analysis. . z0 [) ?2 k0 D0 D& n# n% u: [) O$ |
Self-motivated team worker, good verbal and written communication skills in English.
! \% R. N: u6 d1 b" q( PTechnical and team leadership proffered. Previous management experience highly desired. ' q. W* J1 o: S5 l. L
Experience with synthesis, DFT, and verification is preferred. |
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