Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

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semico_ljj

Abstract -- The diode operated in forward-biased condition has
) j; v! x; z* t! Y& @been widely used as an effective on-chip ESD protection device at
9 O1 ^8 Y7 P9 Q, _% _  IGHz RF and high-speed I/O pads due to the small parasitic
$ c# ?; C2 t6 X' U" yloading effect and high ESD robustness in CMOS integrated
$ J% P) n$ {, T8 P* I2 |3 U! Tcircuits (ICs). This work presents new ESD protection diodes
1 g5 U6 k) |' r1 t3 Arealized in the octagon, waffle-hollow, and octagon-hollow layout
7 {+ b0 I. e1 m" X: istyles to improve the efficiency of ESD current distribution and
( O. d5 i1 O2 q6 f0 Z; z7 Z3 Ito reduce the parasitic capacitance. The new ESD protection
diodes can achieve smaller parasitic capacitance under the same
ESD robustness level as compared to the waffle diode. Therefore,
9 _) j' x; R+ P2 N* e6 q0 }the signal degradation of GHz RF and high-speed transmission
can be reduced due to smaller parasitic capacitance from the new
* W( T' _/ u% n! Eproposed diodes.

xp212125o

看起來有幫助
3 O9 @7 z1 H% g9 l: d% r感謝分享
  t, _' X; t7 T, C; ]5 G; q# D/ h先下載來看看
thank you ~

linyuejing

下載來看看
下載來看看
0 v' V/ `8 U2 _下載來看看
0 u2 a6 `0 q8 c7 Z2 n下載來看看
. [+ g% }% o' C. }9 o應該有幫助
; j9 V( _  K, |謝謝囉

caesarxl

谢谢楼主分享，非常感谢

oika_51

看起來有幫助
感謝分享

linger809

Abstract -- The diode operated in forward-biased condition has
4 N% t3 N0 C1 h  m$ b/ l+ Nbeen widely used as an effective on-c ...
, _) p5 V$ ~9 O* o1 v# @semico_ljj 發表於 2010-6-25 08:50 AM

不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oscargo

正為ESD耐受度傷腦筋----

zhifj86

thank you very much for your sharing

sslin

謝謝大大的分享~~知識因分享而壯大！

  }2 E, R9 v2 N2 s7 p~只有站在巨人的肩膀上才不會被食人族吃了!