The wholechip floorplan is very important before you start the layout.6 a, T' P/ u. R* J+ _1 `3 r
Then the position of output pin are fixed for each sub block,and the line drawing will be smooth." P" H+ }+ O% a: J( P1 k# P* E. ~! d
Finally,the drc & lvs could be so easy to do .; H& d$ A7 `7 R" @. n- X
But the floorplan must be verified by designer.The thing of re-layout almost have not be happened.