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講者:Derek Jao Mentor Graphics HDL Biz. Dev. Specialist
+ i) d* J2 J% z y# g51p, 1.7MB, ppt pdf, 2RDB $ b; I1 @+ c/ w- f
4 r4 [% h: E1 c4 b( Z& Z■Ideal Verification Flow
3 @/ F! N( A) p8 R4 z3 W+ P- t. E■ Advanced Verification Methodology
- T- n5 x2 J2 e6 S! P8 L' }& l& Q- s■Questa Evolution
p) }4 ^* f# ~; b- t■ Verification Management2 ~: i6 S& s) Y) i8 _
■ Questa Verification Library. \% O4 \0 V5 A2 @
■ Power-Aware Simulation
- K6 ] D s4 u% g4 \7 y: W3 \■Performance; x- i5 U" a7 c4 u
■Debug & Analysis* z3 i9 _: W( F: \0 u- n3 G3 f1 _/ L
■Questa Vanguard Program4 \% Q5 f4 r6 v, W, g$ J
■ Summary' e0 I0 p+ d9 H( |
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