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Senior Digital Design Engineer
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' v3 d7 \, B8 {9 m- R公 司:A famous European IC company
% r# R6 l) C- i. w$ y工作地点:上海% l: J/ g3 \0 {+ s& v. F+ b( [7 H' R
. N9 w; M! g& E$ s4 A6 EJob description ) L# d. W( R; k, |& z* N' K7 f
- define system partitioning of s/c circuits and system 6 o& o, g& z3 T6 ^; `+ A
- define HW/SW co-partitioning
3 I) s) k. \2 ]: s# S- provide technical feasibilities based on system simulation and/or FPGA based demonstrator : G* ?8 ^3 A1 x
- propose new technical solutions on s/c and system level
: `5 z; n6 V+ P3 o; H5 P- design digital part of mixed signal (smart power) ASICs
1 K8 P w/ h' w- w& M- close cooperation and interaction with international teams 6 Q: I7 N1 {3 D. D- X
- coach junior engineers
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Required knowledge competencies and attributes " V( D- f# ?! f3 j
- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent)
# r3 \$ V- b' h0 x* F- > 5ys experience in digital design 9 N5 n/ T& ?! V( p2 |' @
- good understanding of ASIC mixed signal flow (Cadence based) : l( E5 O1 `1 M, X8 P8 }9 r* u, S' h
- strong background in HDL coding, verification and toplevel integration
9 y e5 i- A9 v- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray)
0 Z8 }$ X8 n# A' ~1 v/ }1 ~$ S- experience in FPGA development
& p/ V8 {$ F+ Z6 ~' i- very good communication skills (written, oral)
- ^" x+ k6 l, u- self motivated and high level of flexibility
/ W; j1 a+ `2 T$ _ @* ]+ b- foreign languages: English, German (not a must) |
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