標題: IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture [打印本頁] 作者: michaldl 時間: 2009-5-15 04:04 PM 標題: IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture Sponsor' k1 b$ l% `3 }7 z* H
Test Technology Standards Committee of the IEEE Computer Society! W% n0 }7 L* |: R2 H( n( `5 C
Approved 14 June 2001 7 A1 l+ A5 i2 n+ F9 R7 p8 kIEEE-SA Standards Board+ t, F! Z. ?4 `2 S% ~
Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and ) w6 z- t0 |' K% U9 W. L3 n. n9 ysupport of assembled printed circuit boards is defined. The circuitry includes a standard interface' s4 ]+ B' P. b# }
through which instructions and test data are communicated. A set of test features is defined, 9 n3 D" Y3 T S0 iincluding a boundary-scan register, such that the component is able to respond to a minimum set) c5 E1 i& A( O/ J9 D
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language . `. p+ d9 I& Z* q ^! a: m+ H: K. Vis defined that allows rigorous description of the component-specific aspects of such testability features. * A6 B, N( H# m" \+ r " A& B; M/ f# Z4 U: Z& EKeywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,6 @3 l' u0 k3 L _% M) O
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,3 v& W% @* h+ V) d+ c% }$ }
TAP, test, test access port, VHDL, VHSIC Hardware Description Language+ [$ I/ C" e! R0 B3 J( |
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