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發表於 2009-8-14 08:59:04
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Well,% v% O5 X, J6 j$ o# Y, M6 i i
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I just estimate the investiment of a ASIC team.% Z, a& `4 w5 {) m5 v2 R1 X# {
not servey for a project.
* F+ [7 w3 s% P! }So, I just want to know the range of NRE.0 v$ g, ^( u" r# d" `! v
& n. P; P" ^7 {% k* f
For example, It will be $ c/ @% F; v, V5 O/ u# z
(1) 5,000,000 NT$ ?+ Z' i. G+ |" X& P% ?
(2) 8,000,000 NT$ ?
3 t% Y7 @) a0 e8 R(3)10,000,000 NT$ ?) F7 ^# d/ \* ]8 l& I
(4)12,000,000 NT$ ?% v7 i7 X1 I) C }' s
(5)15,000,000 NT$ ?
* G- o! u6 B, ?: t) j) A" c* O1 r5 B/ ]
Sure, I understand following things:
: p7 u, I+ N9 n8 T a, L, u% l - full set mask cost more
2 I% Y( J+ P* g. @5 L% Y - PLL/LVDS... analog IP are extra cost
: v$ S# o F2 v! n1 S; a$ q - pin-count and area also influence cost3 F0 g" S7 N' D% x, e1 B) B
- different package also cost different2 J1 ~! ^( w1 b5 e2 `8 D5 D
- j' [# v1 V- x9 u& y2 CTherefore, if really need information for estimate,$ s' h" y; G# A* {2 {; h
just for example.- P7 C$ }# I* {
Let's assume a SoC for FullHD TV application2 v) q7 I. l5 [+ d
it will include0 O( m, _7 U) }7 p2 @
- ARM AMBA
3 z* L* G( }6 r1 t/ s - DDR2 I/F
. E6 z( D2 I6 E- v7 }8 T - GPIO, IIC,...
$ n6 y" `& s) [& H) B7 @, D V - LVDS out (dual link)
) p0 R% @" _& c: P: ] - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART,- [0 D* o2 L9 O* i/ ]) {7 k
- 12bit ADC, 10bot ADC x2
) }2 c+ e6 N; O4 L4 f) I/ j - PLL/DLL/ T9 L' {5 z" j9 ?
- 256 pins 以上
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Than,... any idea about NRE fee?& c2 f7 J; L5 W7 J
again, I just want to know the range |
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