Mixed-Signal Schematic & Layout Editing, which one has the best tool?

jiming

目前客製化與特定應用類比產品市場所使用的EDA工具，多半缺乏完整的自動設計功能？
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因此，對EDA業者而言，將是一展身手、據地為王的大好時機？除益華電腦(Cadence)、新思科技(Synopsys)、明導國際(Mentor Graphics)與捷碼科技(Magma Design Automation)等重量級EDA業者展開布局外，亦不乏許多新創公司投入...

現今類比及混合訊號EDA供應商發展情形
資料來源：Ciranova、GSEDA(05/2008)
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jiming

Layout Automation for the Next Generation of Custom Chips Like most steps in the IC design flow, custom layout is becoming more tedious, complex and time consuming. To keep up with increasing die size, tight time-to-market requirements and new process-induced layout constraints, automation of the design process must constantly increase. Schematic-driven layout (SDL) is an automated capability that assists designers with the custom physical implementation of circuits (both analog and digital). SDL provides significantly faster layout by automatically maintaining continuity between logic and layout. SDL relies on device-generation technology to automate the creation of physical layout from schematic elements.
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chip123

Silvaco臺灣分公司與台灣類比科技日前共同宣佈一項 EDA 軟體的採購案。國內知名類比/混合信號IC設計公司台灣類比科技已採用 SmartSpice Worldwide Unlimited License，在台灣類比科技各個設計中心，都可無限制地使用SmartSpice，來做各種產品的電路設計模擬。此外，台灣類比科技也採用 Gateway Worldwide Unlimited License，做為 Schematic entry 的工具。

台灣類比科技副總經理黃肇南表示，採用 SmartSpice 和 Gateway Unlimited License 之後，在整體電路設計的效能上提高很多。Silvaco臺灣區副總經理杜啟平亦指出，類比設計工程師在重要的電路設計時，通常有SPICE License不夠用的問題。SmartSpice Unlimited License正可以解決這個瓶頸，有效提昇整體的設計效能，縮短 Time-to-Market，使公司能更快地在新產品上獲得最大的利潤。

chip123

此外，Gateway可以直接呼叫 SmartSpice，並將模擬結果(DC或 Transcient值)呈現在 Gateway上。台灣類比科技在使用了 SmartSpice和 Gateway Unlimited License之後，定能成為更強更專業的類比IC設計公司。

SmartSpice 除了在主要的 foundry驗證過精準度之外，在速度上也有絕佳的優勢，尤其在多核心(Multicore)的機器上效能更是明顯。SmartSpice 除了可模擬大型的電路(millions of transistors) ，在收斂性上也有極佳的成效。如果設計上遇到大型電路，或是模擬時間長的電路 (像 PLL、ADC等) ，SmartSpice 不失為一絕佳的電路模擬解決方案。

: C9 A4 d/ v1 H/ IRubberband是SmartSpice的新功能，工程師可以於螢幕上同時調整數個電路參數，在預設的模擬時間區段，即時得到參數調整後的模擬結果，非常有效率地完成電路設計，避免來來回回的嘗試錯誤及冗長的Spice模擬時間。

jcase

TI 新型 RF 軟體開發套件讓小型基地台和回程網路開發人員
  z$ K3 X% }( l* P; y在一天之內達到 「首次調用」 進而縮短開發時間
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(台北訊，2014年6月17日) 德州儀器 (TI) 宣佈其基地台軟體開發包 (Base Station SoftwarePac) 新增 RF 軟體開發套件 (RFSDK)，可讓小型基地台開發人員配置基頻至射頻通訊，並在僅僅一天之內達到首次調用或系統驗證，此前所需的時間長達數周甚至數月之久。借助新型 RFSDK，基於 TI KeyStone™ 的 TCI6630K2L 小型基地台系統單晶片 (SoC) 和 TCI6631K2L 回程網路 SoC，如今能夠達到如數位預失真 (DPD) 和峰波因數抑制 (CFR) 等數位射頻功能，並採用 JESD204B 介面與 TI 的類比前端收發器 AFE7500 進行通訊，以達到效能與系統電源效率的最大化。此外，RFSDK 還使 TCI6630K2L SoC 能夠與 TI 針對工業解決方案的類比高速資料轉換器進行通訊。
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/ M$ \$ \6 E" v6 V6 s/ \" ^這款創新的 RFSDK 透過提供可與 TI 的基頻處理器和 RF 解決方案相連的完整整合代碼，加快了客戶的產品上市時程。透過提供簡單的 API 和一個類網路介面，RFSDK 可將幾百個射頻專用參數轉移到簡單易用的系統級配置中。在部署過程中，RFSDK 為 OEM 和營運商提供了透過監視和測量完整射頻鏈來達到現場除錯的能力，這在 SON 部署中是至關緊要的。

德州儀器通訊處理器部的產品經理 Cal Parsons 表示，透過幫 TI 的多核心軟體開發套件和電信等級 LTE PHY 增添一款生產等級的 RFSDK 軟體產品，TI 將為客戶提供一個更完整且更齊全的基地台軟體開發包。此外，開發人員還發現，利用 RFSDK 所包含的測試套件、基準測試程式數值和效能報告，他們的系統測試和效能評估工作可極大的簡化。
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供貨情況
. K4 H) ^( Y) q/ C2 ^# GRFSDK 現可作為 TI 基地台軟體開發包的一部分供貨。另外，還可用於 TI 先前發佈的高效能小型基地台開發平台以及由 TI 和 Purewave Networks 提供的 Hercules 解決方案平台。

ranica

Strategic Application Engineer (Communication & Enterprise Power)

公      司：A world leading analog&mixed-signal IC company
工作地点：深圳
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Reporting structure
9 V' z6 N$ D; J) b2 k+ r( y+ pThis is an individual contributor role, reporting to the Principal MTS.  

Tasks and responsibilities
1 |( H  d5 l  X( ?7 z% x·         Liaise with US corporate office to provide a high level of applications support to our customers in the China.
: O  V+ {. j6 s. ]/ Z, J; |6 H·         Develop regional strategic customers or market specific reference design and product application test report.
0 k! }" R: u0 `/ n/ ?! R7 F# ?·         Process competitive solution benchmarking.  
( _  _+ k: B4 B2 _1 x, n# ?·         Identify new business opportunities and drive design-in activities to design-win.
·         Help define new products from customers’ inputs as well as read market trend.
·         Support customers’ production builds and field quality improvement program.
) G5 V! u$ h4 `) m+ i6 g& C·         Conduct product presentation, demo and training to customers and distributors.
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Qualifications and skills
* G5 @9 H, S! y5 G) f" ^  r7 R7 i2 U·         All candidates must have a Bachelor or Master degree in Electronics Engineering.
4 N" y+ ~! O! x/ Y·         Strong technical foundation, preferably with experience in power electronics circuits and switching regulator IC applications in computing applications like, servers, telecom systems.
·         Good interpersonal skills needed to communicate well and maintain good relationships with customers.
·         Independent, self-motivated with good problem-solving skills.
$ D/ ]3 P9 G# t; J; Y4 ?·         Prepared to travel occasionally within the Asia Pacific region and US.
·         Proficient in written and spoken English and Chinese.

ranica

Sr. Application Engineer Software
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) ]5 `" F8 V/ B公      司：A famous European IC company
工作地点：上海

Roles and Responsibilities  
-specify, develop, test and release of embedded software for mobile phone systems  
-development of Linux-device driver, kernel-software and middleware under Linux and Android
-debugging on target platforms
. b1 X5 Y9 K# z" Z-Supporting of customer and platform specific implementations  
' R. w' V) b0 t1 o' o& TKey Performance Indicators (optional)  
Professional Experience in SW Engineering, Communication, independent work style, responsibility, quality of work
   
3 h: a$ u  e) l1 V, X* o4 _  w8 F( FQualification Requirement  
3 U# ^- [& k+ L- I! a5 g(e.g. Education, Working Experience, Knowledge, Skills, Language, Competence, etc)  
$ a( e9 g2 D" P  E# c7 b$ O-Engineering Degree (BSc. or Master) Electronics, Communications, Computer Science or equivalent experience, desired 3+ years experience in mobile industry
-Strong experience in development and integration of device drivers, kernel-level software and middleware in Android/Linux
-Strong experience in software engineering in C / C++, proven experience with state-of-the art development tools for software engineering.  
-Software prototyping and debugging  
  \0 V4 z" a( T& ^8 C-Appreciation of the semiconductor technology and industry in consumer applications (mobile phones, PCs, navigation systems)

ranica

Staff Application Engineer
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, A. F; [) B( N% W. T$ o) y! w& B公      司：A famous IC company
6 W2 n7 u" T. \& T* P工作地点：深圳
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Job Description:
4 ]  ]* Z8 J( h1 @6 i  Motor control design, analysis and development of power electronics for electric vehicle sub-systems and new motor drive applications.
  Testing and validation of motor control system requirements
. ?% P2 R5 [; n5 K3 m4 x0 d  Work with customers to develop and analyze system and performance requirements.
+ b5 i+ `9 N' v3 {# y7 J- ?2 k  Identify the opportunity on new device technology on various electric motor drive applications.
  Report and summary on customer thermal design concept.
( g; }! u+ v& O4 }  Key interface to HQ AE to ensure high level feedback for product definitions and requirements on New applications
  Provide technical support and product training to Field Support team
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5 {' {# t7 ^  Y+ i( V7 ^Job requirement
( ^6 x0 C; I* h! J8 I   Preferably MPhil / Master degree in Electronic Eng., Major in Power Electronics preferred
   Longer experience (more than 5 yrs) working in SMPS fields with bachelor of Electronic Eng will also be considered
7 e# ~9 j  b7 m9 [/ @4 [: {& K) i" ^   Minimum 5 years in R&D of different SMPS topologies or application support of power electronics related fields
   Good knowledge of Power Semiconductor is required
   Proficient in topologies on Server and Telecom design
   Willingness to travel frequently within China and oversea countries
6 f/ ?  X% F! \2 S  g" i6 \   Good presentation & communication skills, an excellent team player and able to work under pressure
   Open-minded and flexible to work with customers and meet requirements with innovative design approaches
1 X9 \/ y# n3 o% `% b   Fluency in spoken & written English and Chinese, and Good PC Skills

ranica

Application Engineer - Software (TD-SCDMA/GSM)
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公      司：A famous IC company
工作地点：深圳

Job Function        
- Support XXX customer for design-win projects  
- This position focus on TD-SCDMA/GSM related support, resolving UE functionality and performance issues in those fields, as well as resolving crash and reset caused by or happened in modem functionality.
0 _& |6 g: z0 b0 l- _0 [0 |- Help chipset OEMs to understand XXX modem software/solution, give customers training on XXX products  
- Play consultant/expert role, trouble shooting, identify problem reported by customers, analysis and report issues to developer team, help developer team to narrow down the root cause and fix problems.
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% ]+ M+ [  _( P6 WSkills/Experience        
( |3 e# m0 ^0 Z2 `! |! x! ]7 i- Good understanding on wireless communication, familiar with 3gpp standard.  
. p: t+ l, Z' O( b) @: ?* `9 l, f- Solid knowledge on GSM/GPRS/EDGE/TDSCDMA
* @8 ^& x, t1 T: U- Strong experience in C programming
+ ?. E3 j0 r9 K- Embedded software debugging skills especially crash debug skill on real time operating systems
- ARM microprocessor fundamentals and hands on debugging using Lauterbach Trace 32 ICD/ICE will be a plus
- Good English communication and interpersonal skills  
" A. m! m( B* \( a8 B- High motivation, strong self-learning ability.
- Demonstrated ability to work with a diverse team from various disciplines and at various locations;  
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( H7 }7 A) G" M7 q! A; xEducational Requirements      
0 g8 h/ _+ I) l/ M* V# b9 u, TBachelor''s or Master''s, major in Electrical Engineering or Computer Engineering

sophiew

Job Title :Analog Design Engineer
0 ?2 J0 n0 T% {7 h* wJob Category :Semiconductor
% P2 [4 R8 y  ~: aLocation : Malaysia
Job Type : Permanent
Job Description:

Analog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.
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Responsibilities:
Interaction with customer to understand customer requirements, develop product specification and to provide technical support.
Close interaction with the design team.
+ m5 s; p8 {* d6 R& w# NSupport and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.
Maintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.
Requirements:
; |7 s% _$ L( R/ N* AIn-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV
% D, Z1 V4 F2 m4 Y2 ^Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc
Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
4 b% E+ ]8 `" p0 N  W. XDetailed knowledge in the design and operation of the following analog blocks:
: S2 ~. B3 [! @; b. ^& t1 Q- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)
& ?( N8 T8 W; b3 f" ~- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)
- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc)
8 a# f  k, i; _# `  H! t5 d& ?- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)
- ADCs and DACs
Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.
! i7 a6 Z4 ]3 K+ ^2 N+ J& PModelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
8 {; v& y# w* fA track record as a team player and capable of leading teams
& o* }" ~" x- I9 pProven experience in developing and meeting engineering schedules
9 g+ L" P8 a8 ?( [" e! |' F( U1 jStrong analytical skills
3 t" S& F3 |* h/ c2 v7 lStrong organizational, interpersonal, written and verbal communication skills.