Mixed-Signal Schematic & Layout Editing, which one has the best tool?

sophiew

Job Title :Analog Design Engineer
7 T8 v/ p$ x  }4 t+ {4 dJob Category :Semiconductor
3 n, d5 b; K" d5 {7 _. l/ XLocation : Malaysia
Job Type : Permanent
Job Description:
( P' y  ?" {( Z! h9 y3 ^
Analog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.

Responsibilities:
Interaction with customer to understand customer requirements, develop product specification and to provide technical support.
+ u5 j7 b* a9 B0 I* S$ S& ~* hClose interaction with the design team.
/ r: l# j/ h) D. l  I, @, @' h& _+ p; \Support and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.
Maintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.
. r- _8 L4 Z+ L2 t' o. G( K3 MRequirements:
In-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV
6 ?6 B( f# K- Q3 e( ZExperience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc
" l6 o0 M( r" RUnderstanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
Detailed knowledge in the design and operation of the following analog blocks:
- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)
- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)
- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc)
- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)
- ADCs and DACs
Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.
. a) f. O9 D# d' [' f8 D- R( T  g4 UModelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
% `, U7 h5 t; b) }# m! Q( H2 ~' q' JA track record as a team player and capable of leading teams
Proven experience in developing and meeting engineering schedules
Strong analytical skills
Strong organizational, interpersonal, written and verbal communication skills.