8:30 | 報到 |
9:00 | Session 1: SmartFusion Family and Design flow Introduction Rajiv Nema, Sr. Product Marketing Manager, Mixed-Signal FPGAs |
- Overview + s, r9 p$ F/ |8 s9 V; y/ W4 G, q3 e7 i
- Design Flows
3 R# w. x2 t. l1 _( |8 ^, o- Demo: Design Flow Demo and Tool Bring Up 3 Q R. P1 R% U9 ?( O0 U8 Z
- Embedded Design Flow |
10:45 | 休息 |
11:00 | Session 2: Leading 32bits MCU Development Tool – KEIL MDK Leon Chen, FAE, ARM Taiwan |
11:45 | Session 3: Designing with SmartFusion I Kevin Wen, Sr. FAE & Processor Specialist |
- Microcontroller Subsystem (MSS)1 K: }# G, q2 A0 J) R
- I/O Multiplexing |
12:30 | 午餐 |
1:30 | Session 3: Designing with SmartFusion II Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: running Sample Designs |
2:00 | Session 4: Analog Design Felix Chen, FAE |
- Analog Compute Engine (ACE)% S# g+ U) S: j
- Demo: Reading POT values and displaying on HyperTerminal |
3:30 | 休息 |
3:35 | Session 5: FPGA Design Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: Adding peripherals into the FPGA fabric |
4:30 | 會程結束 |