Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

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sslin

謝謝大大的分享~~知識因分享而壯大！
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~只有站在巨人的肩膀上才不會被食人族吃了!

zhifj86

thank you very much for your sharing

oscargo

正為ESD耐受度傷腦筋----

linger809

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-c ...
semico_ljj 發表於 2010-6-25 08:50 AM

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, {( Y* g/ h% s7 ]. ?8 Q( ]# l0 z5 W8 W; d不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oika_51

看起來有幫助
. w2 ?5 V  g) M$ |' i感謝分享

caesarxl

谢谢楼主分享，非常感谢

linyuejing

下載來看看
  ~& j7 f8 e8 a下載來看看
下載來看看
下載來看看
應該有幫助
4 H) J- d/ q# O# g謝謝囉

xp212125o

看起來有幫助
感謝分享
1 Y5 l9 e* e/ S先下載來看看
thank you ~

semico_ljj

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-chip ESD protection device at
GHz RF and high-speed I/O pads due to the small parasitic
" `3 C: J) ~- j/ O* F: _loading effect and high ESD robustness in CMOS integrated
& s) D6 k0 V( O, |1 mcircuits (ICs). This work presents new ESD protection diodes
" W0 r: Y. R: S) O: O  K+ s; `realized in the octagon, waffle-hollow, and octagon-hollow layout
+ p8 ]( c/ U% D; a7 W4 }; Nstyles to improve the efficiency of ESD current distribution and
to reduce the parasitic capacitance. The new ESD protection
  h+ a* k& x1 j- ?& ]7 mdiodes can achieve smaller parasitic capacitance under the same
ESD robustness level as compared to the waffle diode. Therefore,
the signal degradation of GHz RF and high-speed transmission
: R$ b1 _  d+ e% P; N# V( Ican be reduced due to smaller parasitic capacitance from the new
proposed diodes.