補充: 3 c1 g( M ~* Q; y/ K3 U1. Reference Library: the reference libraries or Process Design Kits (PDK) where the symbol views of master cells are present. 既你想要用的symbol是來至哪個 library. . v1 Q2 V. x. N6 R; R$ f2. Syntax for Specifying Device Maps in a Device-Map File: + A$ O' Q2 B( O devMap := <primitive_device_name> <mapped_device_name>7 `7 W m' c% L
[ propMatch := list_of_prop_to_match ]% Q0 i- s5 ^ g$ A" q$ d5 h
[ termMap := list_of_terminals_to_map ] # q0 G4 k' h v7 G [ propMap := list_of_properties_to_map ] + y0 S0 C9 Q: R. @2 e/ i( q8 [) Q [ addProp := list_of_additional_properties_to_map ]7 b2 N0 J4 e6 C4 z* B5 ^8 {( v
Example:: P7 l+ R: D$ M' g" u8 Y
devMap := resistor res 9 B8 |6 z \: n6 ]3 C propMatch := r 20000! N/ L! A8 M; _$ l
termMap := PLUS PLUS MINUS MINUS 7 \; G. N3 ^9 P; u propMap := subType type r resVal w width l length ( t; L3 ~/ H# h9 H. v* u addProp := model res