There's a career in Analog/Mixed-Signal? Where's A/MS Talent in Taiwan?

ranica

Responsibilities: - Technical lead of the wireless team in China designing analog blocks such as PLL, ADC, DAC, Filter, Regulator, SERDES - Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS) - Layout design - Block/chip level verification (LVS, DRC, LPE) - Design review - Chip level integration - Test, characterization, debug - Close work with US team including occasional travel - Helping other team members with their design/schedule
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职位要求：
# `! h, J4 i) @0 r$ aJob Requirements (education and experience): - MSEE with at least 10 years of industry experience - Previous leadership experience is a plus - Deep understanding of fundamental analog techniques - Experience with low-power analog design in deep submicron CMOS - Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso - Hands-on experience in analog layout design and verification - Knowledge of Skill, Matlab & verilog programming - Experience with high volume IC manufacturing is a plus - Hands-on experience with lab equipment - Occasional travel to US for technical training/design review/product test

ranica

招聘公司：A famous IC company
招聘岗位：Senior mixed signal verification designer
工作地点：Shanghai

岗位描述：
) ], g& R& ?+ `+ y2 j/ V8 fDescription of Function & Responsibility 1) Design digital behavior model for SOC analog IP, such as transceiver, PLL, high speed SERDES, etc. 2) Build simulation environment to verify digital behavior model. 3) Build mixed signal simulation environment to do Verilog-Spice verification. Check mixed signal simulation results with behavior simulation results to correct model. 4) Extract analog IP timing information and verify.
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$ m: C, j4 Q# {; H2 n职位要求：
Education: MS or above in Electrical / Electronic Engineering. Experience: Master with 4+ experience with emphasis in mixed-signal, digital integrated circuit design. Familiar with Verilog coding, digital verification, mixed signal verification and the use of various design CAD tools such as VCS, NC-Verilog, HSPICE, Spectre, etc. Familiar with SOC chips, knowledge of memory, PLL, ADC, DAC is preferred.

ranica

招聘公司：A famous IC company
' R& b4 X) k8 ~招聘岗位：Senior System SW Engineer
( x4 E1 A: d7 D5 V7 E工作地点：Beijing

9 \5 ?( G3 R" D/ ~8 z, _岗位描述：
2 t( i" x9 ?8 T# X/ ~Job Description: 1. Involved in multi-mode protocol stack(GSM/GPRS/EDGE/TD-SCDMA/TDD-LTE) requirement analysis, design and tracking 2. Involved in multi-mode protocol stack(GSM/GPRS/EDGE/TD-SCDMA/TDD-LTE) architecture design and interface design 3. Follow 3GPP/CCSA standard evolution; 4. Modem platform software requirement analysis and architecture design; 5. Modem platform software trouble shooting and performance optimization; 6. TD-SCDMA Dual SIM Dual Standby platform requirement analysis and architecture design; 7．Cooperate and communicate with technical design teams to achieve modem platform software development;

职位要求：
) t$ z- a) ^! m" dJob Qualification 1. Master or above of Telecommunication, electronic engineering, Computer Science or Automation relevant field; 2. Familiar with wireless communication technology (LTE/TD-SCDMA/WCDMA/GSM/EDGE); 3. Experienced with embedded software programming C, C++. Familiar with Multitasking RTOS environment; 4. Familiar with ARM development tools and debug methods. 5. Strong proficiency in mobile phone platform architecture design. Have knowledge of some mobile phone components(RAM/FLASH/LCD/Keyboard/Power/USB/UART/SPI/IIC/GPIO……); 6. Prefer experience of mobile phone platform architecture design or driver development; 7. Excellent communication and organization skills; 8. Good ability in English for technical reading and writing, fluent in English communication;

ranica

招聘公司：A famous IC company
招聘岗位：Sr. Staff engineer, Analog/mixed signal IC design (wireless team)
工作地点：Shanghai
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岗位描述：
Job Description: Our mixed-signal team develops cutting edge technology for the wireless product line. We are actively seeking talented analog design engineers who want to join a dynamic and experienced team and take their technical knowledge to the next level. This job involves working closely with US team in developing and eventually supporting the production of next generation sub-micron mixed-signal blocks. Responsibilities: - Technical lead of the wireless team in China designing analog blocks such as PLL, ADC, DAC, Filter, Regulator, SERDES - Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS) - Layout design - Block/chip level verification (LVS, DRC, LPE) - Design review - Chip level integration - Test, characterization, debug - Close work with US team including occasional travel - Helping other team members with their design/schedule

职位要求：
Job Requirements (education and experience): - MSEE with at least 10 years of industry experience - Previous leadership experience is a plus - Deep understanding of fundamental analog techniques - Experience with low-power analog design in deep submicron CMOS - Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso - Hands-on experience in analog layout design and verification - Knowledge of Skill, Matlab & verilog programming - Experience with high volume IC manufacturing is a plus - Hands-on experience with lab equipment - Occasional travel to US for technical training/design review/product test

ranica

招聘公司：A famous IC company
1 h! p% M, O, Z% a招聘岗位：Senior mixed signal verification designer
2 l, T& P& B& \& u工作地点：Shanghai

  i* Q, I: ?0 }岗位描述：
Description of Function & Responsibility 1) Design digital behavior model for SOC analog IP, such as transceiver, PLL, high speed SERDES, etc. 2) Build simulation environment to verify digital behavior model. 3) Build mixed signal simulation environment to do Verilog-Spice verification. Check mixed signal simulation results with behavior simulation results to correct model. 4) Extract analog IP timing information and verify.
5 |# [. B* n5 O% @
" g1 k) E7 [& j' m1 |职位要求：
Education: MS or above in Electrical / Electronic Engineering. Experience: Master with 4+ experience with emphasis in mixed-signal, digital integrated circuit design. Familiar with Verilog coding, digital verification, mixed signal verification and the use of various design CAD tools such as VCS, NC-Verilog, HSPICE, Spectre, etc. Familiar with SOC chips, knowledge of memory, PLL, ADC, DAC is preferred.

ranica

招聘公司：A famous IC company
招聘岗位：Senior Application Engineer
' J4 Y- s' r% U! c( K0 D工作地点：Shenzhen
/ ^! D8 {+ N0 |; Y& T* }! [
岗位描述：
$ ]6 H  C& D0 XThe candidate filling this position needs to be an experienced systems/application engineer with extensive tuner/demodulator/decoder knowledge in both hardware and software areas. The main job function includes o Design and support reference designs o Manage strategic partner accounts o Work with local FAEs supporting alpha customers during early product roll-out phase. HW (RF and base-band) design/debug skills are a must while basic software programming skills including driver integration and writing ATEs for reference design testing is highly desired. The preferred applicant will have extensive knowledge of tuner/demodulator/decoder in both system and application level. Previous experience of supporting IC product into high volume shipment is a must. The ability to establish and maintain good partner relationship as well as good technical project management skills is a must Job Description: Primary responsibilities will include: - Supporting strategic partners/alpha customers by reviewing, testing and debugging reference designs. Provide HW & SW driver integration support. This requires up to 30% travel to partners/customers in China - Define design, debug, and characterize reference design EVKs - Generate application note and test report - Manage and provide technical support to multiple strategic partner accounts - Collect market and competitor information for marketing analysis - Travel to US headquarter for product support training as needed

ranica

职位要求：
6 C' X* u+ o% U- U, T" e9 ]. x# d  WExperience: The person for this position will need the following abilities - Strong technical account management and project management skills - Strong PCB knowledge including schematic design and layout. Hands-on skills of PCBs including prototyping and optimization board design. - Strong HW development, debugging and troubleshooting capability - Basic SW programming skills. Able to review basic C/C++ code and provide driver integration support - Customer field trial experience - Extensive knowledge of tuner/demodulator/decoder in system and application levels - Test equipment operation: Spectrum analyzers, network analyzers, signal generators - Must be able to communicate clearly and have good customer interface skills. Qualifications: - BSEE with 7 years or MSEE with 5 years in RF/Mixed signal IC systems engineering or applications engineering. - Tuner/demodulator/decoder hardware/software experience and familiarity with high volume consumer oriented RF IC’s.

ranica

招聘公司：A famous IC company
招聘岗位：Software Applications Engineer - Graphics
/ V( L) k9 u8 F; w: f1 A" C: @8 }工作地点：Shanghai

6 |8 k$ m# ]6 X& K岗位描述：
) c( ^. w9 ~# [- m) l# eBackground XX’s Application Engineering Group is responsible for providing high quality technical support to customers using XX’s products. In order to do this, we have a number of Applications Engineering teams based at various locations around the world. We are now looking for someone to join a small team based in our Shanghai office. This role will encompass the provision of high quality technical support as part of a co-ordinated worldwide team. Applications Engineering role You will be required to gain a good knowledge of XX’s processor cores, GPUs, development tools/boards, and other products through close working with the worldwide application engineering teams and XX's Product Engineering group. Then to use this knowledge to provide XX's customers with the assistance they require to develop systems around the XX processor and XX GPU contained within their new products. The transfer of your knowledge will take a number of forms. Firstly, you will need to be able to provide comprehensive responses to customer enquiries. Such enquiries may be received by email, telephone or face to face meetings. Secondly you will be required to provide in-depth technical training to XX's customers. You will therefore be expected to be able to travel every six to eight weeks. You will also be expected to have excellent interpersonal skills and be a good presenter. Thirdly you will be responsible for the generation and review of new product documentation, such as application notes, frequently asked question lists and user guides. This may include translation for local language support. Finally, you must be reactive to the demands of both customers and sales and feedback requirements to XX’s Engineering and Marketing groups.

ranica

职位要求：
Person Specification Qualifications Good university degree, in Computer Science or Electronics Engineering ideally, although other science graduates would be considered if they have relevant experience. Experience · Minimum of 3 years industrial experience · Strong C/C++ coding and debug skills – preferably using GCC, XX’s compilation tools, or MS Visual C++ · Experience of developing with 3D and/or 2D graphics APIs, ideally OpenGL ES/desktop Open GL/Direct3D and/or OpenVG · A good understanding of the interaction between software and hardware · Experience of microcontrollers/microprocessors · Experience of interacting with colleagues outside of China Desirable · Professional experience of customer and sales interaction – ideally in a Technical Support role - as well as development work · Knowledge of XX processor architectures · Knowledge in GPGPU, ideally OpenCL · Device driver development experience, ideally in Linux/Android · Development experience in windowing systems, for example X11 in Linux · SoC design experience, including development of synthesizable Verilog/VHDL modules Personal Requirements · Must have excellent written and verbal communication skills with both colleagues and customers, including good written and spoken English · Must be proactive in obtaining engineering or management input, in order to complete project and internal tasks in a timely and accurate manner · Must have the desire and ability to solve problems quickly · Must be enthusiastic and well driven · Must be able to schedule own workload and plan tasks – based on both internal and customer requirements. · Must have good inter-personal skills, and be able to work well within a team; especially when under pressure · Must be willing to be flexible and accept new challenges · Must be able to travel on a regular basis, both to give customer training

ranica

招聘公司：A famous IC company
! S. x2 y% A) j' c8 |) ?招聘岗位：(Senior) RF HW Design Engineer—— Mod/RD/HWI
$ u4 C! L4 M* V2 m& P" D5 Y工作地点：Beijing
2 l2 Z% y/ \: ^9 o# \3 G' r" Z
& f; ~7 ?: m0 Q* U; n; u# |$ c岗位描述：
Key Responsibilities:
8 ]7 o* @5 H# M" p4 E/ \1. RF sub-system design through close co-operation with Baseband to develop HW platforms for R&D SW development;
2. RF sub-system design through close co-operation with Baseband to develop effective robust reference HW modem design, which can be used for customers’ mass production;
' v3 `5 \2 g% n+ L3 @0 }3. RF Block Diagram, Link Budget Calculations, Design specification documentation, Schematic drawing, PCB layout review, etc.;
: a( y) h' ~) M! Q" [4 W4. Specifications of RF front end components like duplexers, filters, switches and power amplifiers in cooperation with component suppliers;
. w( u6 c: @' ~1 a# V5. Components evaluation, first reference design builds;
6. Test and verification of RF transmitter and receiver blocks on the reference design;
7. Deliver efficient methods for production calibration and test to customer production;
8. RF new technical track and study;
# K' @3 `# H7 L7 o$ `4 c3 {9. Technical support and customer trouble shooting in RF; 10. Support Customers to develop production environment calibration and test.

ranica

职位要求：
7 k+ D0 a  s6 I0 IJob Specifications:
2 m( c2 a% t7 ]% ?+ y, |; `$ U1. BA degree or above in telecommunication, electronic engineering or microwave, etc.;
# |+ F. O7 k# g0 f2. RF sub-system design and production experience within the mobile communication industry;
3. Ability to read and understand the 3GPP specification in general and the air interface in specific;
4. RF Knowledge in modern wireless communication and communication theory;
5 U0 d$ B1 r7 \: h( j5. Circuit theory knowledge and experiences in RF and microwave;
2 L. @  V' R( c6. RF instruments handling such as spectrum analyzer, RF signal generator, noise analyzer, vector network analyzer, VSA, etc.;
& [$ M! o7 k5 }. a6 R9 Q7. Lab work skills (handling 0204 components e.g. when matching the RF parts);  
& P! x( _9 W+ t0 d3 M7 T8. Skills in Schematic drawing; 9. Fluent English in writing and speaking.

ranica

招聘公司：A famous IC company
6 D1 o* E: B5 @. x% C9 I招聘岗位：CEO Assistant & PR Specialist
; R0 ^8 g4 o6 f, J) ?工作地点：Shanghai
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7 j5 R7 g! T; S( b/ P岗位描述：
5 y- ]% Z, R  Y3 |) b6 E8 ]General Purposes / Objectives 总的目标协助 CEO 处理日常及商务事项，负责公司与政府、行业关系工作 职责范围 CEO Secretary 1.负责总裁日程安排，协助总裁处理日常办公，商务事项 2.整理会议纪要、草拟报告文件及相关文档的建立 3.负责总裁各级文/函/电的处理，协助总裁对外各项沟通和联系工作，包括与投资方的沟通协调。 PR Specialist 1.处理与政府相关部门的联系，为公司争取相关的政策与资金支持及申报 2.处理与行业协会的关系，为公司收取相关行业动态及协会支持

职位要求：
Position Requirements 职位要求 Education 教育: 本科以上，CET-6 Experience 经验10 年以上相关工作经验；至少5 年以上半导体行业相关经验 Specific or Entrepreneurial Knowledge 特殊技能对外沟通协调能力优秀，英文听、说、读、写能力优秀

ranica

招聘公司：a fabless IC design company
招聘岗位：Junior/Senior VLSI Designer
工作地点：Shanghai
. K6 s6 [( O4 q, j& c9 X
! D3 }! J2 R  |岗位描述：
Responsibilities: 1. Chip level micro-architecture design for digital TV and Set-Top-Box applications. 2. RTL level design and system simulations. 3. RTL to netlist synthesis, formal verification and timing analysis. 4. JTAG boundary scan and full scan chain implementation as well as ATPG vector generation.

职位要求：
Requirements: - BS or MS degree in EE with 3+/5+ year VLSI chip design experiences. - Skills and experiences in DTV SOC design, computer system, 2D/3D graphics, digital audio DSP processor and/or networking chip designs. - Experience in RTL simulation tools, Synopsis logic synthesis tools, Formal verification tools, timing analysis tools, and Design-For-Test schemes. - Knowledge and technical background in one or more of the following areas are necessary: Computer architecture, PCI bus, USB, ATA bus, IR, UART, SmartCard, 1394, Ethernet, DDR, SDR memory systems will be helpful - Good communication skills and self-motivation!

ranica

招聘公司：digital audio chip maker
" ?, s9 |! o% r$ e. z. t+ _招聘岗位：模拟IC设计工程师
工作地点：Shanghai
( `6 I+ J" x' E; O0 _" l
( A6 R: G6 {! K岗位描述：
岗位描述： 1. 设计模拟电路或混合信号IC。 2. 使用CADENCE或MENTOR GRAPHICS设计工具进行模拟电路设计，仿真。 3. 设计版图布局，并协助版图工程师进行版图设计，确保版图达到电路设计的要求。 4. 计划实验室评估计划，并使用实验室测试设备对工程样片进行测试评估。 5. 撰写设计，测试报告,协助测试工程师进行中测和成测规范的定义和程序开发，验证。
6 }, E4 X' a* i& f- K$ I8 C/ v  m8 j
8 f: L) G; q2 q, p" n6 t职位要求：
0 ?$ J1 ~. o; F7 L, X职位要求： 1. 具备扎实的电子电路和晶体管的理论基础，掌握IC设计流程、方法及工具，熟悉集成电路制造过程和工艺。 2. 熟练应用Cadence设计软件进行IC设计。 3. 熟悉模拟电路的原理，设计技巧及关健参数，如参考电压源，振荡器，放大器，比较器等。 4. 具有良好的学习，分析和创新能力，良好理论与实际结合的能力，在电子电路方面有良好的悟性。 5. 具有模拟或混合信号IC成功量产经验 、硕士研究生或以上学历。

ranica

招聘公司：A communications chip company
4 x1 h4 w! J0 @( H& E9 Q2 m5 t招聘岗位：内部审计
工作地点：Shanghai

/ @3 @6 Z+ U  o2 W  I1 e2 \岗位描述：
: w7 q2 F! y. t' B2 k* l工作目的和性质：在审计监察部经理的领导下，开展与内控管理相关的组织、协调的相关工作，负责组织对下属分、子公司的审计监查组织工作。 主要职责： 1. 对内部控制及风险管理的有效性进行评审，推动建立、健全内部控制系统。 2. 制定公司内部审计制度，负责审计项目的调查，拟订具体审计方案，出具审计计划与审计通知； 3. 编制审计工作底稿，并收集、整理和归档各种审计资料； 4. 对被审计单位财务收支及其他业务活动的真实性、合法性、合理性、效益情况进行独立的经济检查和监督； 5. 实施审计调查，控制、考核、纠正被审计单位偏离公司整体经营目标的行为； 6. 编制审计报告并就审计结果对财务及经营管理提供有效、可行的建议； 7. 开展内控审计，对公司内部控制制度的建立与执行情况进行审计； 8. 参与经营管理方面的内部控制程序和制度的制订； 9. 综合管理部/审计监察部经理安排的其他工作。
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职位要求：
任职要求： 1. 学历要求：全日制大学财务、审计类专业本科以上学历，持有CIA资质者优先考虑。 2. 工作年限：8年以上企业内部审计监察工作经验 3. 其他要求： a) 坚持原则，廉洁奉公，忠于职守； b) 有较强敏锐的洞察力、逻辑分析能力以及较强的持续学习能力，富有创新意识； c) 熟悉财会、税收等相关经济法律法规，熟悉企业内部控制与经营管理；熟悉内部审计的规范、程序，了解企业风险管理与控制； d) 优秀的文字表达能力； e) 熟悉应用各类办公软件； f) 良好的沟通与团队协作能力，良好的亲和力和应变力； g) 具有较强的自我学习能力和独立开展工作能力； h) 积极主动，能在压力下工作。

ranica

职位描述
1. Application engineer on high power semiconductor devices (e.g. IGBT modules & discretes) for industrial & consumer applications.
2. Technical support on power semiconductor product promotion, application & training for regional customers and distributors.
3. Co-work with marketing & sales colleagues on project understanding & tracking.
% k* x2 _  r0 N" ?, | 4. Domestic & occasional overseas travel required.

" u0 ?2 [; \, o. G4 A4 O' T职位要求
7 Z, [- D# _1 q! S - Good educational background with Master (preferred) or Bachelor’s degree on Electrical/Electronic Engineering (majored in Power Electronics)
- Good professional background with at least 5 years of working experience
; D5 n* S; }) V2 P8 h( [* L - Hardware & PCB design experience on inverters/converter power stage for AC drives, UPS and other power conversion equipment.
- Familiar with PCB CAD software tools (e.g. PROTEL, OrCAD, EAGLE) and skilled in making schematic diagram and PCB layout
( Z2 D4 _# u. W- q! j - Knowledge & experience with IGBT switching, gate driving, protection, cooling, power layout and system issue like EMC treatment.
* s$ x, f5 B8 R* i- Knowledge on power electronic circuits and applications like AC drives, UPS, welding, induction heating, wind/solar power generation, etc.
9 x% N& u% [5 _6 b9 v8 p- Good language skills in Chinese and fluent in spoken & written English
6 H/ G; g5 }8 d. B$ v" o! Z- Strong analytical skills and self-learning/quick learning ability
: h# f% N. @3 W' w- Good interpersonal skill and good team player
- Highly initiative, self-motivated and result-oriented
& m6 N$ w  l) x5 I* g) b3 T - Willing to be dedicated in technical job and taking it as long-term career

ranica

客户 A famous IC company
& f5 T. C, L0 I6 P$ p; z- k, N  g地点 Shanghai

职位描述
4 u. c5 `* Z: b) y: n/ T1. Quality interface between XX and wafer foundry & EPI vendor.
4 O: t+ _5 R' E& z2 a2 z) Z4 K 2. Coordinate monthly business review meeting and hold regular quality review meeting with wafer foundry.
3. Work with engineering groups and wafer foundry to solve wafer quality issue.
4. Dispose wafer related nonconforming material.
4 b0 V* ^" C( I4 n0 p8 u/ w2 F9 H 5. Handle failure analysis for quality issues with foundry and handle wafer RMA.
6. Establish and maintain quality metrics to evaluate foundry quality performance.
7. Review foundry 8D/CAR and verify corrective action implementation and effectiveness.
2 P+ r5 e. Q# d! T 8. Lead wafer foundry audit.
! e# V! T- h$ W) K4 w. k 9. Work with internal integration team to manage foundry change control and follow up XX ECN implementation.

ranica

职位要求
7 |" s+ {. ^( R% u: W; X" B" x Items Necessary Qualification Expectation Qualification
& _$ @! ]" U) @ Education Bachelor degree or above in  engineering.
& y1 u, g; I3 h$ x Experience
: [! Z4 g; \3 ]; h' e Min 3 years experience in wafer fab. Fab process or quality engineer  preferred.
# G( s+ H; m7 i; y0 @: J5 b- {  L, L Skill
Experienced in 8D & problem solving  and SPC
3 d1 D. [: x2 Q! D8 m Familiar with Wafer level FA
Qualified ISO 9001 or TS 16949 auditor
Competency
4 u0 c$ g' C2 C# T9 P! o) X Good written and spoken English.
9 ^2 i+ j, T! q/ q1 V6 e+ S Semiconductor manufacturing  experience
* M( w, i/ x9 j$ |. x$ |* R+ C Be able to work and communicate well  with all levels of external manufacturing  suppliers.
8” fab experience preferred
3 N! Z& v8 x% i. H' N  y Power device (discrete & IC)  experience preferred
. D6 G3 F- c, r  P# F Personality
7 @0 ^" G; K+ l5 p/ _# Y Good Initiative,
Good executive,
$ I( z' q$ x5 J. v# m; H" u2 W1 l Good teamwork.
' U/ b5 h- X  M4 ~ Activity scope
Environment
Location(work place): Shanghai
Work time( part time/full time): Full Time

ranica

招聘公司：a top 15 semiconductor company
/ U' d3 `0 y' @6 N- v* K2 i招聘岗位：PLC AE
( n/ F( M5 T4 h. b$ R3 i# y工作地点：Shanghai

& M9 L2 [2 T% N' V: H岗位描述：
  r! {# o' B# F/ \o Conduct field trials (Coordinate Installation, Debug installs, monitoring of systems performance, analysis of results) o Guide development team in various customers focused areas – Available SWR/HWR tools, product features, ease of use o Technical Support customers with design in of OFDM PLC ICs, Production ramp up of modules, system integration of XX’s PLC solution into other equipment o Writing of Technical Documentation and customer/partner trainings o Initial design/localization of PCB modules

职位要求：
- Be self-motivated with a strong desire to learn new things and work in a developing technology area. - Able to communicate effectively in English - Good communication skill and team work ability - Have excellent troubleshooting skills including hands-on experience conducting experiments with lab equipment. - 5+ experience and good understanding on developing Hardware and Firmware for embedded system solutions (in C) - A bachelor's degree in Electrical Engineering (BSEE) or equivalent. - Experience designing mixed signal circuits for OFDM PLC communication systems and protocols is a plus - Be able to travel often in China

ranica

招聘公司：A famous IC company
招聘岗位：Regional FAE Director
工作地点：Shanghai

& y* q3 n& e' G5 a" x% ]岗位描述：
  D$ i' q+ Z- R: z· Manage field application engineering team and global power resource center (GPRC) in China. · Develop technical support team both in technology capability and skills to support business. · Lead technical support team to provide best technical support to key customers, to increase xx penetration in China. · Coordinate communication between sales, product line department, marketing and technical support, to develop and execute China strategy. · Coordinate communication between technical support team, marketing and product line department in new products and new solution development. · Identify technical trends as well as current and future customer system requirements · Coach technical support team to maintain moral and passion and team’s stability.
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职位要求：
/ z+ _! Y9 K- P; [; J% ^; K· 10+ years experience in technical support or R&D. Experience and knowledge in power supply is a must. · At least 5 years experience in leading technical support team across region. · Good communication in diversified team members, be confident to gain others’ respect and trust. · Strategic thinking, good in business sense, be able to develop technical strategy. · Good in motivating team members to achieve goals, especially under pressure.