台灣類比IC設計 測試服務廠，哪家是最佳合作伙伴？

ranica

3.1 Upstream interface Test Engineer/Senior Test Engineer reports to the Director of Operations
- B5 v6 W1 z6 E* _* X4 N0 C     3.2 Downstream interface Test Engineer/Senior Test Engineer manages the Testing and related subcontract suppliers.
     3.3 Support and Alignment Needed from other xx Organizations: Sales/FAE:

7 c% x3 q$ `% m6 J            Initial project scope input, RFQ
            draft CS and further characterization and qualification QA
            Customer interaction for technical assessment
! |$ y- ~4 N3 t+ j- @% C# c            Customer/Sales feedback on Accent proposal Engineering:
            Cooperation for interlaced design aspects like testability, test plan and test platform etc.
            Common investigations and support for low yield trouble shooting and failure analysis
# k# X4 C% ^6 w7 i8 _: ]: ^            Characterization and reliability test etc. Program Management:
, ~0 w7 m5 j) f6 @& A4 v            Overall Project Management coordination
2 c5 w( j$ P2 H5 v! O4 Q" n: i            Shift of program management control at product ramp-up Admin/Finance:
            PO issuing  Projects test related expenses

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3.4 Main processes interactions Monitoring Process To work with QMS and internal parties to find reliable source for test and test software/hardware development, maintain a good relationship with working level and management of the suppliers, and make the on time delivery of each milestone of the turn-key project. Sales & Customer Relationship Process Pre-sales In the Pre-Sales Phase, the Test Engineer/Senior Test Engineer works in cooperation with Sales, Program Management and Engineering teams to provide a competitive, forward looking and reliable materials cost structure in order to build the budgetary proposal to be presented to the Customer. He will also identify the proper test solution and the right manufacturers to provide the Customer with a competitive production environment. He will get test related price information. Price information to be on time for internal BP preparation. Supply Chain Management Process In the execution phase, Test Engineer/Senior Test Engineer will coordinate the activities of the manufacturing and technical support partners involved in the supply chain, synchronize the logistic flow, monitor the Work in Progress, intervene with corrective actions when required, maintain a constant information flow with the manufactures and the Customers. All of this in order to execute the test related development programs on schedule while keeping or exceeding the margin at the level it has been set at the time of the customer engagement.
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     3.5 What It Is: The Test Engineer/Senior Test Engineer is
) ~* j( |# b  `           Provider of the test related material cost information to build the proposals to be presented to our customers
4 \* g; g6 Z) ^/ O" b! e; @' A           Internal liaison between the design and the production domains
- U$ a; a  w% \5 `           Test supplier and technical support partner identification and test software/hardware development
7 e  ~! I- V& V( w           Supply chain manager
           Test program execution responsible
1 Q1 [/ {" ^* P! G           External subcontractors coordinator
           Customer technical interface for back end related matters
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( e9 h7 q( ], |: a! m3 Y# E     3

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6 What It Isn’t: The Test Engineer/Senior Test Engineer is not:
% G- l4 @  X2 @  O           Direct executor of back-end programs as he does not have internal resources to carry on activities such as load-board design etc.
           FAE, Test Engineer/Senior Test Engineer depending heavily on FAEs to gather information from customer side, understand the real needs, receive business proposal, and drive the direction of customer communication.
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职位要求：
4 MAIN DUTIES Test Engineer/Senior Test Engineer is responsible for:
 Adherence to planned costs and exceeding sales baseline profitability targets o Cost information collection for CS publishing o Continuous reductions of costs in line with market conditions o Monitoring of actual margins and maximization of profitability
 Production program management and supply chain management o Customers order management o Production flow planning o Logistics o Subcontractors management o Supplier/customer liaison
 Test engineering o Proactive support to the Technology organization in the concept and design phase to ensure smooth transfer of design to production o Effective management of a network of suppliers for load and test boards and test-related materials o Test programs development, through Accent’s test engineering workforce and through selected subcontractors, to be researched and qualified by the operations group o Relationship with the selected partner test houses o Order fulfillment o Tracking of production o Corrective actions implementation o Information flow to customers

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 Yield and cost improvement o Test costs, test program and test time optimization 5 EDUCATION & EXPERIENCE Test Engineer/Senior Test Engineer holds a degree in electronic engineering, or physics, or related engineering. He has at least 5 year experience in the same or equivalent engineering position. Strong semiconductor test experience. 6 SKILLS
 Detailed knowledge of high volume IC production techniques and requirements, Far Eastern subcontractor experience desirable
# Q9 |* Z/ @* R6 j# Y Professional approach to meeting project deadlines/schedules, within budget, & providing customer satisfaction.
( ^7 f+ e. v# }" l& G) @3 b( Y/ s Ability to work in & foster a teamwork environment.
0 a4 O2 q& c+ I: a Service oriented, and excellent communication skills in English and Chinese (both written and verbal)
+ [5 E0 o9 Z+ l; O4 K/ Y( Z Good knowledge of IC semiconductor test, test software and hardware, product qualification and characterization, and low yield failure analysis disciplines o Understanding of chip specification and test plan o Good knowledge of test platform, eg Advantest, Teradyne, Verigy etc o Good knowledge of test hardware, probe card and loadboard, change kit and socket etc o Good knowledge of characterization and qualification plans related to test o Understanding of characterization data collection, analysis, and reports o Understanding of low yield failure analysis investigation techniques and methodologies
 Some understanding of CMOS and BiCMOS process technologies
 Ability to supervise and control subcontractors’ manufacturing activities to ensure on-time execution 7 BUSINESS METRICS & SUCCESS INDICATORS: The Success of the Test Engineer/Senior Test Engineer must be measured in tangible terms with respect to his contribution to the package of turn-key project. Test Engineer/Senior Test Engineer will adopt a set of metrics and indicators to measure his performance. These metrics will be set and reviewed quarterly. Pre Sales:
 % of on time response to test related items of RFQs (according to Accent’s internal guidelines) Financials:
 Test related back end projects costs (actual costs vs. planned costs)
 Forward looking test pricing (deviation vs. standard market trend). Quality:
$ q( o# d8 t% D) l % of successful production ramp ups for test-related influencing factors

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招聘公司：A famous IC company
招聘岗位：Testing Engineer
5 ^! h6 Y  N4 ]& H% z9 q, @工作地点：Shanghai
9 e9 D* V/ g9 N# B2 K+ m* o0 Y1 q
; u. s" K1 B, R, T; F+ h岗位描述：
1.Be responsible for the PCB design and testing 2.Discuss with chip designer, understanding their requirement and design the PCB board correspondingly 3.Testing the chip performance and generate test report to describe the chip test result

; e+ J7 Q# z8 l) v- p职位要求：
2 _; W0 D* y5 o) `; h+ J1. B.S. in electrical engineering or equivalent is required 2. 2 or more years of PCB design experience 3. Experience of Allergo, PADS or other PCB tool is required 4. Experience of Xilinx/Altera FPGA is preferred 5. Experience of using multimeter, waveform generator, oscillograph is preferred 6. Verilog coding experience is preferred

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招聘公司：A fabless IC design company
招聘岗位：Testing Engineer
工作地点：Beijing

岗位描述：
3 b' Q9 u' G  |. ^4 ^- Support test pattern bring up for new products - Debug test program issue during engineering trial run. - Co-work with designer and quality engineers on low yield verification/improvement. - Assist subcons on test program SW/HW build up 工作内容 - Work with IC design team to define, develop, and ensure quality of testing methodologies. - Responsible for the engineering and production. - Co-work with QA to setup related reliability tests on reliability subcon houses - Bring up wafer sort and final test program for NPI and production. - Wafer sort and Final Test ATE sustaining, yield improvement, PFA, and test coverage enhancement and test time reduction. - Test subcons management and fully responsible of bringup the new independent testing house. - Data automation and tool generation

职位要求：
5 v8 F; D8 v9 b1 yEducation: Bachelors degree required Experience: Minimum 2 years testing experience Skill: Basic knowledge in Analog/Digital device circuitry. Knowledge of design for manufacturing, design for test, digital/analog test methodologies and circuit analysis skills will be added advantage. Good documentation and communication skill in both Chinese and English

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实验室测试工程师
客户 A software agent company
地点 Shanghai
6 s8 A5 f4 g* b' D
  V) n5 f$ l/ s+ m- U2 Q0 o职位描述
- W: I( _! m) @; |9 x9 m3 o职位职能: 实验室芯片测试验证
" W9 ^; d% l' B: b. c% b
职位要求：
1、本科及以上学历，电子、通信类相关专业；
2、3年以上半导体从业经验；
9 S/ L3 Y  Z. o% R) X3、具备一定的C、C++语言基础；
' {  a. }4 n( H7 N- P, D4、具有良好Verilog语言开发应用能力，较强的逻辑思维能力；
5、具备一定系统应用开发能力；
6、熟练使用PowerPCB等软件设计PCB；
7、熟练使用各种诸如示波器、信号源之类实验室的测试设备；
8、具有良好的人际沟通和团队协作能力，较强的自主学习及创新能力，分析解决问题能力；

ranica

实验室测试工程师
4 P+ ^+ I2 G! Y8 E
1 {5 z2 P$ t8 e- |2 ^( x' A公      司：NO.154-A software agent company
% ^/ h5 x0 u1 A, p, ?工作地点：上海
6 A) y! a& H4 `, n, x) w$ C
2 u0 p; {8 E9 j: h" K  l1 Y# d% c职位职能: 实验室芯片测试验证
7 C; H! ^" |6 f' k
( D# m* ~4 w% Z  Y% M职位要求：
1、本科及以上学历，电子、通信类相关专业；
2、3年以上半导体从业经验；
3、具备一定的C、C++语言基础；
4、具有良好Verilog语言开发应用能力，较强的逻辑思维能力；
5、具备一定系统应用开发能力；
/ f) ]; H) X+ M) y6、熟练使用PowerPCB等软件设计PCB；
7、熟练使用各种诸如示波器、信号源之类实验室的测试设备；
# Y' {. ^: O- s# {- O# ]5 p8、具有良好的人际沟通和团队协作能力，较强的自主学习及创新能力，分析解决问题能力；

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System Testing Lead/ Manager

5 F  S0 `7 ~) b公      司：NO.86-A famous IC company
# r0 C9 p5 K+ q1 r工作地点：北京
: N2 W8 s1 ?: W$ h$ r% X! \
Responsibilities:
% w+ Q! w! p5 W. ^8 P* uDevelop and maintain test systems and tools for validation of company''s STB (Set-top box) products and associated products.  
Perform hardware validation on new and existing digital set-top boxes.  
! D2 C& N% q0 q0 B( p9 IPerform performance level testing on network interfaces.  
Provide test results to set-top vendors and review hardware design providing input on design changes to bring the product into compliance.
Travel to third party test labs to witness or perform set-top box testing.  
Troubleshoot hardware related issues and failures as needed.  
Maintain appropriate test equipment and set-up.  
Recommend new or modify existing hardware requirements as needed.  
5 b- h# P. J1 u5 J" U& v% h/ E) vRecommend new equipment and test processes as needed.
·         Excellent troubleshooting skills including use of code debuggers.  
·         Good communication (written and verbal) skills.
; t7 \4 M' T; a" b# L$ s! ?$ C' a3 p8 p& e·         Ability to work effectively in multiple tasks and with changing priorities.

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Experience:
Minimum of 7 years in consumer electronics industry performing related job functions.  
Experience in writing system test plan, test design, test cases and execution  
7 q8 {; G5 h" z& `- RExperience in generating test report and status report.  
Experience in any test management and issue tracking tools.  
! k6 x- v4 g0 h/ aExperience should include hardware verification testing of audio/video interfaces including RF out, HDMI out and composite interfaces as well as Cable front end tuners.
" X# \9 p5 J% P( l/ _7 o! K+ TExperience may include the use of such test equipment as spectrum analyzers, oscilloscopes, network analyzers, logic analyzers, VM-700 or equivalent, cable load generators, QAM modulators, temperature chambers, data loggers, impact hammers, etc.
+ W2 F' }, e6 M' `RF experience is preferred, especially in the area of RF immunity related to ingress mitigation.  
Familiar with ESD and surge concepts and failure mitigation.  
Performed or participated in product testing related to physical and environmental testing  
' Z3 a1 B- }3 P; ]1 E* Q2 O3 Y% R
/ M: c. E. s5 M$ I$ bEducation:
·         Minimum of a Bachelor’s Degree in an Engineering related field

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Senior Software Engineer (Test/QA)
公      司：NO.122-A famous IC company
工作地点：上海

Job Description  
This individual will understand product MRD, programming guide and software requirements and derive Test Plans and Test Procedures to verify and validate chip driver (including firmware) functionality.
6 Q6 `, p! L, o) o0 }- k8 AThis individual will interface with Software and Chip Designers to review testability.  
) U6 S) n& c2 d" {' \7 NResponsible for helping develop and perform thorough Production Test of various silicon tuner products.  
This individual will develop automatic test software that will verify that SW (including FW, driver and application program) does or does not meet requirements and specifications.
This individual will be responsible for logging all known bugs in SW (including firmware, driver and application program).  
. k1 r0 Z3 {2 ^# AResponsible for developing and debugging the required Test SW to be used for Production Test, as well as Product Characterization.
3 \* S! \  S- `Responsible for correlating between ATE Test results and Design/Bench Verification results.  
  q" k1 }: w3 j, HWill provide on-going support for SQA enhancements as needed to insure high quality and the most cost effective and efficient manufacturing through-put.

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Required Skills  
The ideal candidate will have:
% o7 [( I4 r  J$ ~( T2 _Good English writing and reading skills, can write professional technical report with guidance.  
Good at speaking and listening in English.  
Intellectual honesty in logging all known bugs.  
& J  U- ]8 d/ X! jHas scripting experience on Linux and Windows.
8 h' Y9 f* J7 i; |' e4 d1 LRequired Experience  
" z) `! {4 u) B" `$ ~8 @$ D& OThis position requires a BS/MS in Computer Science, Computer Engineering or Electrical Engineering.  
  E) \7 t" k+ D! tAt least 5 years of experience with LabVIEW coding. A CLAD or CLD certification is very desirable.  
Has product testing background. Can be in communication, wireless, semiconductor or networking product. IC verification experience will be a highlight.
+ I2 k6 U3 w# T/ d! ?4 uHas scripting experience on Linux and Windows; such as VBA, Python and Perl.  
Experience with one or more of the following tools:  Tortoise svn,  Tortoise git,  JIRA, Crucible etc.  
( k! s$ v5 m3 lFamiliar with test equipment: such as SA, oscilloscopes, signal generators, VSA etc., but do not need be an expert.
; ~! I- q; ~& NFamiliar with communication and control protocol; such as JTAG, I2C, RS-232, SPI, TS etc.   
" p! Z7 s  A& O( m  bBasic RF knowledge and wireless communication knowledge are desirable.  
, x9 N) _0 }3 l0 o9 ^0 oBasic DSP knowledge is desirable.

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System Testing Lead/ Manager
! s6 q; z0 t+ s! U$ \公      司：A famous IC company
工作地点：北京

; p! i7 y; H+ p% GResponsibilities:
" @" W) l; H! g7 N7 D3 i8 WDevelop and maintain test systems and tools for validation of company''s STB (Set-top box) products and associated products.  
Perform hardware validation on new and existing digital set-top boxes.  
9 d6 F8 R' ~: m# ^Perform performance level testing on network interfaces.  
Provide test results to set-top vendors and review hardware design providing input on design changes to bring the product into compliance.
Travel to third party test labs to witness or perform set-top box testing.  
& x7 c+ J. y! kTroubleshoot hardware related issues and failures as needed.  
0 b4 r* Y% K' ]6 B. GMaintain appropriate test equipment and set-up.  
! N( _& Y: W+ vRecommend new or modify existing hardware requirements as needed.  
7 [$ ~/ X" c+ f  B4 F5 \' kRecommend new equipment and test processes as needed.
·         Excellent troubleshooting skills including use of code debuggers.  
) R; F4 \& ~# T1 C·         Good communication (written and verbal) skills.
0 {3 C  [" M: |% w+ H* g) c·         Ability to work effectively in multiple tasks and with changing priorities.

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Experience:
Minimum of 7 years in consumer electronics industry performing related job functions.  
9 x5 F* B4 C- T: I: S' aExperience in writing system test plan, test design, test cases and execution  
Experience in generating test report and status report.  
Experience in any test management and issue tracking tools.  
Experience should include hardware verification testing of audio/video interfaces including RF out, HDMI out and composite interfaces as well as Cable front end tuners.
Experience may include the use of such test equipment as spectrum analyzers, oscilloscopes, network analyzers, logic analyzers, VM-700 or equivalent, cable load generators, QAM modulators, temperature chambers, data loggers, impact hammers, etc.
RF experience is preferred, especially in the area of RF immunity related to ingress mitigation.  
6 u( I, K3 `8 w* B; l( MFamiliar with ESD and surge concepts and failure mitigation.  
1 w+ I3 M9 H! J- ?) Q8 `  s! s  X* O+ aPerformed or participated in product testing related to physical and environmental testing  
+ C5 C# I1 c/ z, P2 w, C
  g- _& t% C- @5 j+ d) aEducation:
·         Minimum of a Bachelor’s Degree in an Engineering related field

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高级系统测试工程师
9 U1 R% C/ t8 u$ O- F7 }6 t公      司：A mobile chipset semiconductor company
, G8 o+ X+ Q/ _( a: [* t工作地点：上海
6 K. [$ f" B' t2 T& e/ E
职位描述

. L8 D# s* b# p7 W5 ]% {1、依据缺陷的分析和模块的特性，组织对平台和项目用例进行优化，提高测试用例质量
2、依据项目设计需求，结合平台模块的测试特性，组织整体分析测试策略，给出方向性的预测，提高项目测试质量
3、依据产品测试发现的严重缺陷和客户反馈的缺陷，组织进行缺陷问题模块的深入分析，促进测试人员业务知识进步，提高测试质量。
9 _* @. f+ C4 ?) t( }. w  C4、对测试过程中发现的问题进行分析、总结、跟踪；
5、从测试的角度帮助整个研发项目团队定位问题。
职位要求
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1、本科以上学历，五年以上手机软件测试或产品测试经验或软件开发经验；
0 j1 u; W" w  {2、熟悉JAVA语言和应用层代码结构;
8 ?8 S5 l& @  q4 x. S5 y) j. b3、熟悉软件测试流程和测试技术；
4、具备一定的手机硬件知识；
5、具备较强的学习能力和良好的沟通能力；
6、具有较强的分析和总结软件问题的能力；
7、热爱软件测试工作，具有强烈的责任心；
8、善于沟通。

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高级自动化测试工程师
% m1 a8 A5 O4 r& a, w+ _1 X" `公      司：A mobile chipset semiconductor company
4 B, O7 e# b- W- J工作地点：上海
0 X7 i1 p0 |9 a! X; i
. y! I% A4 }0 [+ c$ x% m" m职位描述
9 |- a/ k; d+ ^5 Y6 Q8 F( H! a1、依据项目需求，能独立开展较为复杂的自动化测试用例制定和测试脚本编写，构造自动化测试平台，以实现项目平台与通信的自动化测试要求。
2、能独立或指导他人对产品的软件通信和平台性能进行自动化压力测试，通过测试对产品软件性能进行评估，能独立发现产品软件缺陷并进行分析解决，提高测试质量。
/ w7 s: g" r$ x. b3、依据项目需求，独立对其他手动测试用例进行分析，评估自动化测试可能性，提高测试自动化覆盖率。
4、制定系统测试工作相关的学习目标和培训计划，组织人员进行系统的测试知识结构的定期沟通交流，促进测试经验传承和交流，提高平台测试质量。

* F( ?3 G+ }' ]+ v职位要求
  d7 x4 S! P- g9 o( ?5 A7 ?8 y1、本科以上学历并在业务相关的技术领域内工作至少五年；
2、具备扎实的通信、计算机或电子专业背景知识，并具备丰富的自动化测试经验；
3、精通TD\GSM\WCDMA无线通信协议；
4、精通脚本语言，如VBS、Python、C、java等；
3 u' M6 |2 }1 ^( Z/ m( U$ Q5、精通平台相关知识，熟悉andorid开发工具。

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Senior/Principle TD Engineer(PIE)
公      司：A famous IC company
工作地点：上海

职位描述
1) Responsible for the advanced memory process development with our foundries.
1 f( N7 k2 Z* K8 i2) Develop new or modified process formulations, define processing or handling equipment requirements and specifications.
3) Review product requirements with the design staff to ensure compatibility of processing methods.  
& {, o! f5 g* E4) Simulate/define/test SONOS device structures
5) Yield and reliability enhancement together with related staff.
; K+ f2 r1 X3 j# a
其他必备技能：
1) This position requires a Bachelors degree in Electrical Engineering, Material Science, Physics, or Chemistry; Masters or PhD is preferred.
2) The individual must be self-motivated and self-directed, however, must have also demonstrated ability to work well with people and have a proven desire to work as a team member.
* m5 }8 ?! U: M; O/ A4 D8 n3) 12inch fab and SONOS experience is a plus.
4) More than 5 years’ work experience in fab or design house is preferred.

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Senior/Staff Test Engineer
! j2 X' T2 @/ }+ G7 V公      司：A famous IC company
3 L3 Z/ K3 m1 O0 r工作地点：上海

Responsibilities
' \! c/ q+ n# z: [3 {( O? Developing ATE test programs and test solutions for Mix-signal/SOC IC products
? Testing and characterizing IC with ATE or Lab-based platforms
+ j# l, o" f# G( k1 Y职位要求
Mandatory Skills
? Good knowledge about ATE test
) K7 C' f, b( W/ d" b? Good knowledge about Mix-signal/MCU test solutions
5 n3 d( V% j: B: o- {? Experience with IC Quality & Reliability Engineering
5 P5 n& q! e7 A' f7 e* ]. Q? Fluency in English (both Oral and writing) and communication skill

Preferred Skills
1 }: V$ `; f& B+ _( y0 M9 H8 x? Experience with Credence/LTX D10 or Teradyne Magnum tester
( v- ]8 s2 a& w? Experience with Load board hardware design
? IC Product Engineering related knowledge or experience
  H7 M2 ]. j. o' o+ Z' _6 j4 H( S? IC chip level characterization and validation related experience or knowledge

Education
" s) d% m5 e& B& |  L* F& |Bachelor or Master Degree of Electrical Engineering, Computer Science or Control
Systems
5 |! e( @) B- b; A# l3 FExperience
" Y" N+ i  ?% l" o6 V  D? 6+ years of working experience in the high-tech industry.
; S9 U4 C0 H/ m? 2+ years of experience in an US or Europe based company
? 4+ years of experience in ATE and IC test platform development

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RFIC TEST ENGINEER
) A! ~. s" `: E$ `公      司：A famous IC company
工作地点：新加坡
0 U) y7 Y; V2 z, N7 c
2 d" T3 ~, N5 B% kMajor Responsibilities:
Responsible for planning, developing, maintaining RFIC automation testbench and test characterization.  
+ @8 U0 i) Y( PEnsure that our products are manufacturable, and exceed the performance expectations XX’s global customers.   

Selection Criteria:
  v2 U( o- g  B5 B1 d8 ~·         Knowledge and experience of RF circuit characterization, e.g.Transmitter, Receiver, LNA, PLL and RF/Microwave components.
8 C* Y' l1 S7 y* C6 Z·         Knowledge of RF test methodology e.g. gain, NF, intermodulation-distortion, ACPR, phase noise, EVM, etc).  
9 e( t4 W  `+ q+ M·         Good knowledge of Labview, Excel is required. Knowledge of Visual basic, VBA, FPGA will be advantageous.
·         Experience in troubleshooting and ability to resolve test setup is required.  
3 ^' q& `: P" m& {5 b! V·         Ability to read and interpret engineering drawings is required.

ranica

高级软件测试工程师
- {5 p& S+ `  j# }公      司：A mobile chipset semiconductor company
工作地点：上海

岗位职责  
1.负责LTE及相关多模协议测试；
) z& L2 j$ ]- X8 s6 q2.负责编写LTE相关测试case、脚本；   
3.负责在相关仪表上编写自动化测试脚本；
+ O; K8 E+ B. l4.负责各项目运营商、设备商IOT测试；
/ v2 ?- P3 H  @- j' ^, `5.熟悉Anritsu 8430 C/RTD脚本开发者优先。  
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任职要求  
1.通信工程本科及以上学历；   
2.两年或以上的LTE测试经验；
3.熟悉C/VB编程语言；
6 _6 }7 L/ W. [5 U1 l! w4.熟悉LTE协议(Physical/MAC/RLC/PDCP/RRC/NAS)；
9 m4 M+ S5 b- D6 ]8 _9 h# z5.熟悉VoLTE，IMS系统以及SIP/SDP协议；
6.熟悉主流的LTE测试仪表。