RF engineer's toghtest job function?

ranica

RF Systems Design Engineer
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公      司：a world leading RF MEMS company
: t" B& ]2 f/ Q: _- A* i工作地点：上海
2 G- p# `+ _, W# {1 @& a& ~
职位描述
SUMMARY (of position): Systems Design Engineer responsible for strategic customer design & applications support, with primary emphasis on wireless handsets. The successful candidate will be responsible for supporting internal and external customers, providing on-site customer technical support, training and presentations, product benchmarking and advising customers on designing with ****’ products and helping solve any technical issues customer''s may encounter. Additional responsibilities include gaining feedback from customers for MRDs, and developing materials for technical seminars, application notes, trade journals and conferences. This role will involve travel. Candidates should possess a BSEE and MSEEE, and have experience with electromagnetic simulation tools such as, HFSS, CST, Sonnet or others and have experience with RF system simulation tools such as ADS or Designer. RF or microwave board level, layout and systems and RFIC design is a plus
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! ~, E7 \" G& Q3 MESSENTIAL DUTIES AND RESPONSIBILITIES include the following. Other duties may be assigned.  
+ X( R4 a2 ]( B  n* }- Must have current or prior experience as a cellular handset designer &/ or RF Applications Engineer  
- Experience in Cellular Handsets:  
; g# L. o0 _, ^( H7 q9 m Overall system architecture design & applications  
& V8 I4 W6 \8 K# u0 J FEMS  
 Antennas  
0 Z1 [6 Q& M$ [$ p Power Amplifiers  
 Interface specifications (SPI, I2C, MIPI, RFFE, etc.)

ranica

- Experience in Antenna Design – familiarity with basic antenna types (PIFA, ILA, Loop, etc…)  
- Ability to advise customers on the application of CK products for use in antenna Aperture Tuning and Impedance Matching
- M# \3 D9 u) X# J5 r- Experience in RF Systems board design is a plus  
4 B* G* F. M- k, V  v% [- Ability to translate customer needs into actionable design requirements for **** Inc  
) J4 b! q1 k& ^& [9 b  I- Experience developing hardware & software tools and collateral for customer adoption  
" H1 w1 I7 V- T4 Y- Reference design experience highly desired: GSM, EDGE, WCDMA, 3G, 4G, etc...  
) H* J( Q; x7 g( l- Understanding of transmission line theory, electromagnetic theory, Smith Charts, & RF test equipment  
- I7 A4 H) B: z1 C3 h- Provide on-site technical support to customers including requirements analysis, design-in support, product trainings, performance evaluation and tuning, application and troubleshoot support, etc.
- Aggressive technical support in capturing new designs  
7 K1 x  b: N) ~  s$ b& B- Collaborate with sales and marketing teams to penetrate strategic accounts and support marketing events. Provide customer/market insight to marketing & engineering/ product group in new product definition process.
! P) U' U1 G( L  H( {% U- Track projects regularly, lead customer and internal communications, drive design-wins and resolution of issues.  
- Good understanding of customers’ eco-systems, preferences, engagement and market trend.  
8 F4 ?  h( C: z) o. P- RF CMOS experience is a plus  
5 z2 d# {) z  t- Must be a self-starter and have excellent communication skills  
- Proactive and highly self-motivated. Ability to work independently.  
$ ~% s. M  m0 W6 F- Good learning agility and communication skills are required.  
* Q: J5 B6 w. N6 c1 F- Good command of spoken and written English and Mandarin  
  A8 i1 ]1 f( f  d- Travel will be required.

ranica

职位要求
SUPERVISORY RESPONSIBILITIES Initially this role will have no supervisory responsibility. However, potential career promotion could rely on ability of ideal candidate to take on supervisory responsibilities in Applications, Marketing &/ or Sales.
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QUALIFICATIONS  
 10 years mobile terminal, RF component or front-end experience (or advanced degree)  
 Cellular/ high volume CE design or applications experience  
 Ability to communicate effectively and efficiently   
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EDUCATION and/or EXPERIENCE  
 Degrees preferred : BSEE (min); MSEE (preferred)  
 At least 10 years mobile terminal, RF component or front-end experience (or advanced degree)  
 Familiar with cellular systems and standards (CDMA, GSM, EDGE, WCDMA, etc)  
7 D. v# L5 |( A- q+ A$ {4 K Familiar with RF EDA tools such as ADS, HFSS or others, RF or microwave board level, systems or RFIC design.
6 Q* p1 n* ?3 n/ n" Q Knowledge of cellular RF front-end architectures  
3 ~, {# Z1 Z- q8 \2 N: O* {0 E" L Understanding of various key interface specifications (SPI, I2C, MIPI, RFBus)  

4 |3 H9 o; g3 Y/ e7 {0 E( B* o  
0 U% I5 i# g9 F! n0 U9 p! o- S
HARDWARE/SOFTWARE  
6 b' q7 a7 N0 G! J' \1 VHardware experience to include RF/ analog component & systems  
2 V8 g  m- Q5 ]& wSoftware experience optional but desired  
RF design tool experience is desired (EDA tools such as ADS, HFSS or others, RF or microwave board level, systems and RFIC design).
: `/ W1 G& B3 R6 `' pCERTIFICATES, LICENSES, REGISTRATIONS (Described or None)  
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None  
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' _) [/ d* h, T  _, ?9 l8 FPHYSICAL DEMANDS - While performing the duties of this job, the employee is regularly required to sit and use hands to finger, handle, or feel. The employee frequently is required to talk or hear. The employee is occasionally required to stand and walk. Specific vision abilities required by this job include close vision, color vision, and ability to adjust focus. The employee is occasionally required to travel to customer sites in the US and abroad.
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WORK ENVIRONMENT - The work environment characteristics described here are representative of those an employee encounters while performing the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

) B' T+ [+ Z6 O* c2 [; X) ]The environment is that of a typical office or laboratory. The noise level in the work environment is usually quiet.

ranica

HardwareEngineer
# e2 W9 c% C2 Q. }公      司：A famous IC company
( A( Z/ V5 Y1 T$ Q1 |$ Z  k工作地点：上海
$ ]  ?# _0 x8 o
职位描述
1.Be responsible for hardware system design, discuss with chip designer, understanding their requirement and design the hardware system(schematic, PCB and C program) correspondingly
; A' v! y0 ?$ I# X( S3 L& m# o# y9 N' f2. Testing the hardware system and provide test report
3. Debugging the system, discussing with chip designer and help chip designer debug the issues  
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3 p5 n8 }' D1 L$ ?$ f! D- l* m要求：
+ S, w$ j! \+ Q. a! j1. B.S. in electrical engineering or equivalent is required
3 X( {4 k: E; l( I$ t# i; t3 x$ L2. 2 or more years of PCB design experience is required
8 a( K* i; ~& Q  N; A( Z6 K1 }3. 2 or more years of C programming is required
% K. @5 Z5 d" P3 h4 m" s; A9 h4. DDR knowledge and testing experience is required
# i: c2 L+ \- b. K" ~0 Q' G5. Experience of Xilinx/Altera FPGA is preferred
6. Experience of embedded system is preferred
7. Experience of using multimeter, waveform generator, oscilloscope is preferred  
8. Verilog coding experience is preferred  
  
5 F/ R6 ~! M) @* M9 q/ ePS：最好有 . DDR knowledge and testing experience is required

ranica

Staff Analog Design Engineer
4 ^# _6 @- i6 @' T4 X& L公      司：one famous IC company
! I6 w+ E  W6 o& J1 E工作地点：上海
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0 w) U" j) f" P4 ]职位描述
Work with analog and ASIC design team for new product development;
5 A4 i* ~, v& N6 h Work closely with layout designer for layout implementation  
9 \! Z; }6 s) j9 M- r Verification of performance requirements using appropriate simulation and verification tools.
Support test & product team with chip debugging, failure analysis, characterizations and product release efforts
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职位要求
+ u) V% u% i& e% H8 \% I0 SQualification Requirements
: w) v/ ^) D! N( j Master degree or above in EE or related field;
9 w# C; b9 k+ _" } 5+  years of experience on analog IC design area;
$ Q$ v) g- I  R Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system applicant
( @. x6 V3 a7 o  \: ?2 E* e. _ Strong experience in certain analog blocks design, such as Serdes or sigma-delta AD/DA, Temperature Sensor.  
! [' a% [. e. D# n Familiar with CAD tools, such as schematic capture, SPICE simulator (or equivalent transistor level circuit simulator), Virtuoso and Matlab system building;
& j2 \6 }% w. q, `0 b Understanding of CMOS process technologies and device physics
Excellent English in speaking, reading and writing skill
Good communication skills and cooperative spirits.  
0 D% D" F$ I9 s+ B( s7 D  ~ Outstanding ability of self-management / self-motivating and attain goal under pressure.

ranica

Staff/Senior Program Manager
公      司：A famous IC company
  a  W9 N4 c5 |! `工作地点：上海
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Job Function
Program Management (for Design & Development, New Product, Launch, and Sustaining IC Development) of chipsets / chip / IP-Technology

" @% n4 w8 k# i( f4 e: fEstablish stable Plan of Record (POR): ensure roadmap/requirements baseline, project priorities, requirements change control, driving synchronization across several development teams, coordinate and synchronize external deliverables, and schedules among many world-wide design centers, etc.  

Drive planning/scheduling: develop the execution schedule to include staffing needs and interdependencies. Coordinates department schedules resources etc. and develops program master schedule, work plans, checklists, design reviews, and resource requirements.

ranica

Establish routine update & communications process: update status, schedule trends vs baseline, risk management, mitigation and recovery actions, etc. Develop program indicators to push information to internal customer teams and management, develop content and present at monthly program reviews. Partner with other functional areas to establish critical processes to support disciplined product development and decision making and to ensure quality. Interfaces with internal company departments, (contracts, legal, design and product engineering, manufacturing, technical publications, product support, etc.), to be aware of each departments work priorities, available resources etc. Interface with external ASIC, assembly, and test suppliers.

6 W% \+ o5 R/ }! ~ Coordination across multiple development sites will be required. This includes different Qualcomm sites as well as contractors, both domestic and international. International travel to other development and customer sites may also be required. Organizes and leads interdepartmental meetings (i.e. leads meetings with engineering, foundry, technical publications and/or product support), to set project milestones, define project tasks, establish program policies and processes and allocate resources.

: I% ]2 G' X& Q) U% Y, ~Responsibilities
Responsible for establishing project milestones, definition of project tasks, establishing program policies and processes and allocation of resources.

0 @7 i- h7 s1 r# U9 d* l1 lDelegates project assignments to internal departments where required. Develops control systems and methods to accurately monitor and measure program progress, identify potential problems for each internal department, identify risks, and to then develop and maintain risk matrix with mitigation and contingency strategies, monitor adherence to program master plans and schedules. Troubleshoots program issues and helps to develop alternative program tasks, schedules, milestones, processes etc. to resolve program issues.

ranica

Communicates project status, issues, and recommended mitigation plans to cross-functional core and executive teams. Participate in design reviews and coordinate or assure compliance to design or department checklists and procedures. May interface with customer or supplier directly on a regular basis throughout the life cycle of program.Position requiring knowledge in the areas of VLSI Design and Methodology, Packaging, Reliability, Fabrication, Product Development, and Sustaining IC Management.

Skills/Experience
3 s5 z3 w+ D  d8+ year experience in related IC design and total product development with a later career emphasis on program management of those disciplines. Be able to multi-task with and understand/facilitate/guide a variety of disciplines such as IC design, CAD, modeling, fabrication, test and verification, product support, reliability, process control, scheduling, applications, and business/contracts.
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* |0 j# ^! B! C1 dSelf-starter. Ability to manage, influence, and set direction of multi-faceted, multi-disciplined teams and programs independently with minimal supervision. Business acumen required.

ranica

Candidates should have previous high volume, component-level, program management experience. Must have excellent written and verbal communication skills, interpersonal skills, and the ability to mentor and motivate project teams.

Must be able to articulate vision and influence decision making and outcomes both within company and with external suppliers.

Must have a "whatever-it-takes" attitude using diplomatic leadership skills within a collaborative teamwork environment to accomplish the necessary results. Must be prepared to help in whatever capacity is necessary for the success of the program.Sound judgment calls in day-to-day engineering and marketing decisions.
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Self-managing and team player with collaboration.
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/ X; [& S! X, n: ^5 H, T8 G1 G( J/ S# fComputer proficient and literate
$ @+ s6 Z, T+ d! M& X! N$ ]Education Requirements       BS in EE/CS/CE or related field, MS/MBA a plus

jcase

Sr. RF Tool Engineer
公      司：A famous IC company
) q# o. Q) ^6 J% K5 `; R工作地点：深圳
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职位描述
- Support Qualcomm 2G/3G/4G chipset customer for design-win projects
" G$ w8 H+ I3 `: |" P" s: Y- Help chipset OEMs to understand QCT software/solution, give customers training of QCT products
' P% _* I3 h, U+ S4 K' U% p% I- Help/direct customer engineers to resolve the issues in using QCT solution no matter it is QCT problem or not
- Play consultant/expert role, trouble shooting, identify problem reported by customers, analysis and report issues to developer team, help developer team to narrow down the root cause and fix problems
" P/ }% [% S# a- L- Familiar with usage of wireless test box such as CMW500, Anritsu 8820 or Agilent 8960, spectrum analyzer, signal generator, Oscilloscope etc
: v- Q3 L1 V7 b1 s( q- Familiar with 3GPP RF test spec and production test requirement
- g, d4 `# ^6 x0 R  T- Familiar with factory tool development, e.g. RF calibration tool, RF test tool, etc…
+ f7 j3 U2 `( n5 u+ _- Strong C/C++ programming skill and debug skill
- Strong experience in ASM/C/C++ programming.
; g+ P7 a* [1 e( v6 I: ^; i0 r- Good knowledge on digital communication system including GSM,CDMA2000, WCDMA, TD-SCDMA or LTE is highly preferred.
- Good knowledge of RF and analog circuits is highly preferred  
- ET tool development experience is highly preferred
- Strong English communication and interpersonal skills, high motivation
) Q; f  a$ T/ J* T( o1 {& y1 p5 w- The ability to learn quickly, and must be a self-starter

jcase

Staff Analog Design Engineer
公      司：one famous IC company
工作地点：上海
6 y4 I( g$ ]- u( s- D: t: W
6 R* ]( z& b* m+ ?& J9 E" G3 ?职位描述
) Q& L3 P# u% v- y% `% M1 O" e Work with analog and ASIC design team for new product development;
/ ?; e7 E: e; F/ f; o Work closely with layout designer for layout implementation  
: ?) @+ d: S/ p, W  \ Verification of performance requirements using appropriate simulation and verification tools.
. y) e: g7 n' t) F Support test & product team with chip debugging, failure analysis, characterizations and product release efforts
- T( e. B, d4 h3 v7 L, A
Qualification Requirements
Master degree or above in EE or related field;
. `) m* O" [" t) j 5+  years of experience on analog IC design area;
: a( v) |. b7 H5 y- Q Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system applicant
Strong experience in certain analog blocks design, such as Serdes or sigma-delta AD/DA, Temperature Sensor.  
Familiar with CAD tools, such as schematic capture, SPICE simulator (or equivalent transistor level circuit simulator), Virtuoso and Matlab system building;
6 @3 m0 S0 N$ B- Z% d. O1 O) p Understanding of CMOS process technologies and device physics
& M, r+ n5 N$ q% u9 `0 y Excellent English in speaking, reading and writing skill
) k) a5 @, t  y; A3 O Good communication skills and cooperative spirits.  
, E. b, H5 j' ?; v1 t Outstanding ability of self-management / self-motivating and attain goal under pressure.

ranica

System Engineer
公      司：A famous IC company
0 l# j+ x8 Q6 M0 e0 C工作地点：上海

Description:  
·         Responsible for overall motor control system solution success, including motor control system analysis, modeling, motor auto tuning and design of motor control systems for applications ranging from home appliance to industrial drives
·         Working with IC and marketing to define new products
8 ^6 h2 a* f4 G" e7 j! Y5 T4 |8 I! L5 b·         Working with application to define/deliver control library within SDK
7 {) T/ ~* V: L; Y" Z·         Provide customers world class motor control library and motor control reference design
·         Testing and validation of motor control system
·         Provides technical leadership for projects incorporating complex electromechanical (“Mechatronic”) systems
·         Designs and optimizes simultaneous system performance goals through requirements flow down
! Z' F3 V( Q, `- D+ _- {·         Effectively integrates all aspects of a design through the use of multi-disciplinary engineering
·         Verifies and calibrates motor control characteristics, diagnoses and corrects deficiencies in designs and prototypes
; }7 A2 O* s& J2 w+ P4 o  `* l6 U+ @( j( Z·         Understands and creates system and subsystem specifications
·         Stays abreast with new technology
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7 b2 U7 C1 f. z  x# J1 aJob Requirements:  
% K" K% \7 R7 S% P/ ~) i; a·         Experience with design and analysis of motor control systems.
·         Strong computer skills, and knowledge of simulation tools (e.g. Matlab) is required
$ ^6 Z: T# H0 x·         Experience with ARM platform is preferred
·         General competency in all core fields (electronics, electromagnetics, computer hardware and software) is preferred
·         Background in industrial drive systems is preferred
- c0 y7 N# d, E0 ^·         Excellent problem solving techniques
5 ^( ]: _" P9 Q" M3 F" w: A·         Knowledge of system synthesis, analysis and verification techniques
·         Good organization and documentation abilities

ranica

Senior Communication Specialist
0 S" }. j" Z7 E! Y0 W公      司：A famous IC company
0 k( X: o' _2 l( \- G! ~工作地点：上海

Job Description:
- Support head of communications for internal and external communications
4 d% M' u& F2 m) ^1 i, P- Implement internal communications strategy/plan, providing support to country organizations’ strategy and objectives. Manage internal communication tools, such as newsletter, company announcements, company intranet/share point, draft internal eMag, internal newsletter, organize all-hands-meeting
- Support head of communications on corporate profile management, including corporate brochure etc.
3 T! @$ r- \+ ^# p" D* Q- Enhance and protect company reputation by driving company branding initiatives, such as press release and media events

8 l- O8 l! }) t' P1 G+ aRequirements:
- Bachelor degree or above, Communication major or Journalism is preferred
9 J+ a. F! k) z3 ^' P- 3-5 years solid communications experience, preferred in B2B company
- very good communication skills, open, team work spirit
- Very good writing skill both in Chinese and English
" Q* V. K% z- B8 g- A- English knowledge is a must, both written and oral

ranica

RFIC TEST ENGINEER

2 x( N- t0 b. Q5 B" K公      司：A famous IC company
工作地点：新加坡
+ S5 K! t9 u  Y( {! q1 \! l1 \' {
# Z" o5 d, T! V# vMajor Responsibilities:
- r5 X/ i9 p; iResponsible for planning, developing, maintaining RFIC automation testbench and test characterization.  
& ~7 C( u* S) l3 oEnsure that our products are manufacturable, and exceed the performance expectations XX’s global customers.   

Selection Criteria:
8 \2 |$ P0 t9 C8 x& u. K·         Knowledge and experience of RF circuit characterization, e.g.Transmitter, Receiver, LNA, PLL and RF/Microwave components.
·         Knowledge of RF test methodology e.g. gain, NF, intermodulation-distortion, ACPR, phase noise, EVM, etc).  
·         Good knowledge of Labview, Excel is required. Knowledge of Visual basic, VBA, FPGA will be advantageous.
( }. H- m- ~: I9 b·         Experience in troubleshooting and ability to resolve test setup is required.  
/ g+ X; V9 M( _7 V' U" m4 m, c" s·         Ability to read and interpret engineering drawings is required.

sophiew

Senior Analog Layout Engineer
公      司：a top 15 semiconductor company
工作地点：北京
; I5 ~% `& `* r0 Z) g
Job responsibility:  
1 @, \2 `' T9 Q$ X0 [This position will participate in layout design team for analog and mixed signal circuits layout on CMOS and high voltage BCD process. Work through entire chip construction process, from preliminary floor-plan, detailed sub-block layout, and top level integration  and routing. Responsible for running full verification sequence using advanced EDA tools. The responsibilities will include but not limited to:
           Leading top level layout  floor-plan  and integration
            Transistor level sub-block layout based on schematics provide by designers, including careful analog considerations
            Completion of DRC and LVS check and verification tools
) u8 h4 d- ]  k2 L1 a            Hold and attend layout reviews

& O- ]# p& h8 r2 u: qQualification:  
            BSEE or above
. C- k# W: g# M            5+ years working experience as an analog layout design, 3+ years top-level tape out        experience
9 @7 S' f8 H4 x) V$ b4 @" A            Experience of high speed circuit analog layout  
6 a+ ~0 q" f6 E6 D3 e" V            Understand IC process basics
            Understand circuit basics and how they impact IC layout strategy
) d7 c6 ]) H. l7 T            Good English language skill
            To be able to travel abroad frequently

ritaliu0604

System Engineer
9 G8 s+ V, a! y* ~. e: h
公      司：A famous IC company
工作地点：上海
1 u( E. s0 N; j$ Y1 R6 [/ D
. Y. s+ \4 v6 \! oDescription:  
·         Responsible for overall motor control system solution success, including motor control system analysis, modeling, motor auto tuning and design of motor control systems for applications ranging from home appliance to industrial drives
' }( N  r: c( Y, I' @; I* t·         Working with IC and marketing to define new products
7 f: I5 D0 H& ~- T4 f- ]* F5 H·         Working with application to define/deliver control library within SDK
, P8 ^, b. f9 {. l) w2 H  p. L·         Provide customers world class motor control library and motor control reference design
' Z- B% @. c( c8 u' k" d·         Testing and validation of motor control system
. t- v- @5 Y" G+ u( [0 |·         Provides technical leadership for projects incorporating complex electromechanical (“Mechatronic”) systems
·         Designs and optimizes simultaneous system performance goals through requirements flow down
·         Effectively integrates all aspects of a design through the use of multi-disciplinary engineering
' a: M% h/ x8 j- u' W& d: x* _+ O·         Verifies and calibrates motor control characteristics, diagnoses and corrects deficiencies in designs and prototypes
·         Understands and creates system and subsystem specifications
·         Stays abreast with new technology
- n" |' L$ P6 Z" m! l6 t
Job Requirements:  
·         Experience with design and analysis of motor control systems.
·         Strong computer skills, and knowledge of simulation tools (e.g. Matlab) is required
·         Experience with ARM platform is preferred
$ B" l0 X: p9 q; w7 F7 J# Q·         General competency in all core fields (electronics, electromagnetics, computer hardware and software) is preferred
·         Background in industrial drive systems is preferred
·         Excellent problem solving techniques
·         Knowledge of system synthesis, analysis and verification techniques
; H& V% E" k/ ]. N; e& r! x·         Good organization and documentation abilities

ranica

室内通信测试工程师

" {8 l, `" e0 |* ^( p9 n公      司：A mobile chipset semiconductor company
4 L% N6 ?7 c+ P6 ^( m工作地点：上海

( n' B& _* o- `" ?岗位职责  
负责系统验证LTE/WCDMA/TD-SCDMA/EDGE/GSM相关的终端测试   

任职要求  
1.具备通信，电子工程或计算机科学相关专业学士学位及以上；
2.至少在通信行业从业3年经验；
3.了解及掌握LTE/TD-SCDMA/WCDMA/ GSM/ EDGE协议相关的知识。
下列操作之一者优先：
1.具备LTE/TD-SCDMA/WCDMA/ GSM/ EDGE的研发经验；
2.具备手机认证测试经验GCF，PTCRB，CTA和运营商的测试等相关经验；
3.熟悉Android系统并了解相关测试方法；
4.熟悉项目管理和具备良好的团队合作精神；
5.具备良好的书面和英语口语能力。

sophiew

高速模拟集成电路设计工程师
% i: |- ?6 e  M. ]; k2 Y公      司：A semiconductor company
8 \9 n* v1 n. L  w+ o工作地点：上海
1 T8 L, l% _; e: _* _' z
1 ?( _# }+ [- s. z职位描述：  
1、负责高速模拟电路的设计、开发、优化；  
2、版图的设计及验证；  
) v7 c3 Y( Z. T! {, V/ Q3、电路版图参数的提取及后仿真；  
4、芯片的测试和分析。

职位要求：
1）微电子、集成电路相关专业硕士或博士学位，或学士学位3年以上模拟IC设计经验；  
2）熟悉和掌握模拟集成电路及版图设计的原理与技巧；  
3）有通信系统用集成电路芯片设计和成功投片经验；  
5 N8 J+ V* |5 J* t, X" Y. R4）善于沟通、工作踏实、责任心强，具有良好的团队协作精神；  
, {/ ?) m+ p" P4 W5）有下述项目经验者优先：高速锁相环(PLL），时钟数据恢复电路(CDR），调制驱动电路，宽带放大器，限幅放大器，跨阻放大器等；