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RF engineer's toghtest job function?

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1#
發表於 2014-3-11 13:14:26 | 顯示全部樓層
Sr. RF Tool Engineer! ]" K3 |2 Q! q
公      司:A famous IC company# k3 l% z: B# \6 Q* B$ ?- e9 T
工作地点:深圳9 j& l; z8 N1 h$ q

0 y* H- j, S+ u- Z职位描述2 j5 ~2 p* l6 i
- Support Qualcomm 2G/3G/4G chipset customer for design-win projects 7 P1 w3 C7 A6 b; F* d7 m- f- r) x
- Help chipset OEMs to understand QCT software/solution, give customers training of QCT products . n' o7 |% }, ]" E+ O
- Help/direct customer engineers to resolve the issues in using QCT solution no matter it is QCT problem or not. j5 w5 U( O0 ]5 V0 T6 V
- Play consultant/expert role, trouble shooting, identify problem reported by customers, analysis and report issues to developer team, help developer team to narrow down the root cause and fix problems3 ]" ~& f, b. v: r" ]; d$ {
- Familiar with usage of wireless test box such as CMW500, Anritsu 8820 or Agilent 8960, spectrum analyzer, signal generator, Oscilloscope etc
5 `2 {9 c. V% D- Familiar with 3GPP RF test spec and production test requirement
% Y/ M, c# A1 n5 `7 J# V5 @- Familiar with factory tool development, e.g. RF calibration tool, RF test tool, etc… + O2 R1 n4 ]- U& g4 I
- Strong C/C++ programming skill and debug skill + e6 l2 l9 R8 A+ F% P6 I7 x: c
- Strong experience in ASM/C/C++ programming. . P; r2 w2 v/ y6 h( b9 q2 C
- Good knowledge on digital communication system including GSM,CDMA2000, WCDMA, TD-SCDMA or LTE is highly preferred.
5 z  U5 y6 W2 z/ {$ Z- Good knowledge of RF and analog circuits is highly preferred  5 X' T, Z+ o: m. e8 I* Q  H% N
- ET tool development experience is highly preferred
0 f5 b) [( v! {9 c( f; C- Strong English communication and interpersonal skills, high motivation
+ ~* P; d' h; _7 I- g* b- The ability to learn quickly, and must be a self-starter
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2#
發表於 2014-3-11 13:18:00 | 顯示全部樓層
Staff Analog Design Engineer& @0 X7 ]1 ~0 }& |
公      司:one famous IC company0 x* ?- j) t: j4 f# \
工作地点:上海
7 _2 f1 g2 ]5 [' ^( z; B- L6 W/ B% ?' W7 v+ n
职位描述; C. _& Y) j+ V& S
Work with analog and ASIC design team for new product development; + |8 X* K  G! |9 w: g# a! X, M9 O
Work closely with layout designer for layout implementation  + ]& N$ k  m& h" U
Verification of performance requirements using appropriate simulation and verification tools.
. R* L9 k8 Z; R, T Support test & product team with chip debugging, failure analysis, characterizations and product release efforts9 _7 w+ k' V/ b

" |$ w. K- s2 I3 cQualification Requirements . f, c9 _' `) m, u: r
Master degree or above in EE or related field;
* Q6 T( C$ K; M3 j" j/ ? 5+  years of experience on analog IC design area; 2 Q8 x/ f! n. H+ k& M& w
Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system applicant
/ X# E; ?. B6 M. I Strong experience in certain analog blocks design, such as Serdes or sigma-delta AD/DA, Temperature Sensor.  0 ?* \1 q# e6 R- v6 h: G
Familiar with CAD tools, such as schematic capture, SPICE simulator (or equivalent transistor level circuit simulator), Virtuoso and Matlab system building;
5 {' y  F2 M* d Understanding of CMOS process technologies and device physics , P, d' M& u0 y& x9 C% {
Excellent English in speaking, reading and writing skill
# C( u* f  D) |. F- ] Good communication skills and cooperative spirits.  ; C4 w9 ], s* [5 N7 f
Outstanding ability of self-management / self-motivating and attain goal under pressure.
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