台廠有哪幾家有設IC Design Quality Manager職務？何者最難？

jcase

Product Engineer
  k. z9 L( w: U( K' Y- {公      司：A famous IC company
% k9 _- Y9 X$ o: L工作地点：上海

职位描述
' W  q5 q! ?1 t1 S" Q; I* D2 W Ideal candidate will have completed BSEE , with 5 to 10 years experience in Semiconductor field.

Candidate should have strong oral and written communication skills -must be english speaking.

& \2 |0 c& p# I# F Candidate must have demonstrated strength with analog circuits, and familiarity with typical lab equipment such as scopes, DVM’s, curve tracers, and function generators. Strong bench skills are mandatory.
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+ F1 q6 Y2 u! m2 J+ Y Ideal candidate will also have ability to debug IC’s to component level from design schematics and plots.

. P* L' s) l* T% t( J& B. v* O; C Failure analysis background is a plus.

. s+ `5 V  s6 D- o! h: B" b+ A1 I. V Candidate must also have ability to follow documented procedures, and must be able to work independently. Individual will report to management team in US.

& L! n2 v: O. [7 L Job function to cover all aspects of New Product Development and Yield management,including bench-to-tester correlation, tri-temp characterization using ATE equipment, trouble shooting and yield management

jcase

Hardware Engineer
) c$ q" S) J& b6 a4 `- d9 Z' i公      司：A famous IC company
+ d1 A. R$ g- g0 _# B. @工作地点：上海
. i4 E7 A: Q- c. R) X4 Z- A' T. e$ W
: h! U. O$ @& O6 ^职位描述
/ n) e; T3 h6 V2 p1.Be responsible for hardware system design, discuss with chip designer, understanding their requirement and design the hardware system(schematic, PCB and C program) correspondingly
2. Testing the hardware system and provide test report
) a: w4 L3 l3 Q5 ?/ o6 o* U3. Debugging the system, discussing with chip designer and help chip designer debug the issues  
' I0 [7 a6 v9 u5 ~) k# c
职位要求：
$ H8 q' F6 |2 f: A& O3 Q' C7 C1. B.S. in electrical engineering or equivalent is required
/ K) V6 m  y/ u3 G2. 2 or more years of PCB design experience is required
3. 2 or more years of C programming is required
2 r' E4 Y+ i5 s4 e3 N, Q4. DDR knowledge and testing experience is required
5. Experience of Xilinx/Altera FPGA is preferred
6. Experience of embedded system is preferred
  k/ [! V$ T9 H, F$ }% O7. Experience of using multimeter, waveform generator, oscilloscope is preferred  
8. Verilog coding experience is preferred  
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- f" d, Q* @/ N' k4 B# tPS：最好有 . DDR knowledge and testing experience is required