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RFIC工程師門檻?要當RFIC Designer的三大條件?

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21#
發表於 2014-3-6 14:30:43 | 顯示全部樓層
Sr. RF Tool Engineer) X- F* e- C& @' U" e
公      司:A famous IC company
0 g% T5 ]& A( a% s# X1 p工作地点:深圳6 l& W% z8 m) G- C! o% J
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职位描述
+ _3 `. G( u/ b3 l9 ~) b- Support Qualcomm 2G/3G/4G chipset customer for design-win projects
  O& @* C+ b: F0 T- Help chipset OEMs to understand QCT software/solution, give customers training of QCT products
2 E5 s$ `1 L" D, b% o/ D4 L$ N- Help/direct customer engineers to resolve the issues in using QCT solution no matter it is QCT problem or not' o+ G: b  p4 n( q: g7 Y# h9 n( H* M
- Play consultant/expert role, trouble shooting, identify problem reported by customers, analysis and report issues to developer team, help developer team to narrow down the root cause and fix problems
/ q9 a& y$ r1 x3 z) Z- [$ s- O- U- Familiar with usage of wireless test box such as CMW500, Anritsu 8820 or Agilent 8960, spectrum analyzer, signal generator, Oscilloscope etc
2 v3 @  {0 p' c0 w) P6 b4 \! O. F- Familiar with 3GPP RF test spec and production test requirement # B/ Q3 o- D5 H
- Familiar with factory tool development, e.g. RF calibration tool, RF test tool, etc… 5 a5 ^+ w( r  @$ q
- Strong C/C++ programming skill and debug skill
# k9 T' T, ~5 {9 z; h/ {6 i- Strong experience in ASM/C/C++ programming. 8 [  C; A! L+ a" ?! q; l0 S  X
- Good knowledge on digital communication system including GSM,CDMA2000, WCDMA, TD-SCDMA or LTE is highly preferred. 4 V3 I3 w5 T, j
- Good knowledge of RF and analog circuits is highly preferred  
3 G3 {1 d  z7 ?, p+ X$ |' T# W- ET tool development experience is highly preferred ( h8 J- G3 z0 I( B) F
- Strong English communication and interpersonal skills, high motivation
0 `9 }  f+ Z/ \2 W9 {9 P& W6 j: u- The ability to learn quickly, and must be a self-starter
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