Plunify技術副總裁暨創辦人黃瀚華
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8 A! m8 S% G9 `( a# m在2009年共同創辦Plunify之前,黃瀚華曾分別在AMD超微半導體(Advanced Micro Devices)日本分公司與賽靈思(Xilinx)美國總部擔任設計工程師,負責開發行動電腦(Mobile PC)韌體(Firmware)以及基於FPGA的系統,在電子設計產業已累積超過十年的經歷。7 Y1 j. g9 u7 G% V
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黃瀚華擁有美國史丹佛大學(Stanford University)電機工程碩士,以及卡內基美隆大學(Carnegie Mellon University)電機與資訊工程學士的學歷。除了英文外,Harn Hua也精通中文與日文。/ z u( t" p" {. z9 e6 C! v/ f+ T2 E
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黃瀚華發表過的作品如下:4 p: A1 R. }; ?# u
) F" F7 [( T/ i3 G+ O+ qØAcceleratedSystem Performance with the APU Controller and XTremeDSP slices, XilinxApplication Note 717, Harn Hua Ng, Latha Pillai, 2005 http://www.xilinx.com/support/documentation/application_notes/xapp717.pdf
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ØPPC405Lockstep System on ML310, Xilinx Application Note 564, Harn Hua Ng, 2007 http://www.xilinx.com/support/documentation/application_notes/xapp564.pdf
3 K, w1 v0 L& y+ X# IØMinimalFootprint Tri-Mode Ethernet MAC Processing Engine, Xilinx Application Note 807,Jue Sun, Harn Hua Ng, Peter Ryser, 2007 http://www.xilinx.com/support/documentation/application_notes/xapp807.pdf
2 n7 o. g, T L, r. q+ zØCloud-basedParallel Design Space Exploration using EDAxtend, DAC 2012 poster presentation,Harn Hua Ng, Cristopher Magalang, 2012 |