Which verification elements does your team use on your current design project?

ranica

Pls check all that apply, unless you don’t know?

ranica

Senior Physical Design Engineer
公      司：A famous IC company
5 g) i8 t! ]2 y1 ^& z工作地点：南京
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Key Responsibilities  
Depending on experience, key responsibilities will involve some of the following:  
% R$ I  Y- h# {, lIC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
% r( J- M& w6 ?; u7 KAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
# l! W* `: w# b5 wLeading a team of physical design engineers and resolving the technical related issues.  
Crosstalk analysis, power analysis, and static timing analysis.  
) X* I7 B3 e# `, _9 i* YWrite scripts in Tcl to improve productivity.  
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: t* C8 @8 L: J' u6 G4 u职位要求
Experience: 5+ years in physical implementation engineering   
" K1 ~; f+ W9 L0 B# ]$ P7 TEssential skills  
MS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills  
* Y4 ~! Z$ x1 n5 Z8 `1 c  vExperience with Magma or Synopsys place-and-route tool set and physical design project implementation.  
" \- d* X1 _" `2 W+ {5 e& `Good programming skill. Capable of writing Tcl or Perl.  
& e& K4 H- j# q7 H% ]7 K% iFamiliar with synthesis, static timing analysis.  
Self-motivated team worker, good verbal and written communication skills in English.  
8 u! S8 M' a; LTechnical and team leadership proffered. Previous management experience highly desired.  
Experience with synthesis, DFT, and verification is preferred.