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Senior Physical Design Engineer8 f8 h& a+ l; v' q7 w
公 司:A famous IC company
1 @& v2 M9 M1 n4 ? u工作地点:南京* ~# x, H4 ]5 m3 L3 ]5 j+ }
* _5 \5 r8 T9 ]# L4 ^Key Responsibilities
: K9 U3 v1 M: x3 Z8 jDepending on experience, key responsibilities will involve some of the following: 3 K4 o8 H* n+ k
IC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification. z+ i5 v( a8 k# R
As a key member of physical design team, your will work on one of most advanced and the most complex chip designed. - y1 [4 M- G0 A* J' S4 p+ ?
Leading a team of physical design engineers and resolving the technical related issues.
$ W* H& w9 o: B7 F4 R4 O' Z6 }9 \1 [$ PCrosstalk analysis, power analysis, and static timing analysis.
, F, i1 J# T1 r* b* P# E9 c3 C8 fWrite scripts in Tcl to improve productivity. + D8 q; b- O1 ~ f0 F; W
+ P% c J Z4 F' c0 l# N( y% NExperience: 5+ years in physical implementation engineering
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Essential skills
% q% w. @9 o: T' k+ LMS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
* r: E8 }: U' }( v% B$ N) n( AExperience with Magma or Synopsys place-and-route tool set and physical design project implementation. 9 [4 I; \" z/ _' z3 z
Good programming skill. Capable of writing Tcl or Perl.
8 ~) l7 h% N/ q; N; @Familiar with synthesis, static timing analysis.
) x _: n0 h0 v6 o* ?. J* oSelf-motivated team worker, good verbal and written communication skills in English. / M- z' E) h, g* t
Technical and team leadership proffered. Previous management experience highly desired.
) S- l+ W) W) g4 p5 ^' \/ RExperience with synthesis, DFT, and verification is preferred. |
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