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[企業求才] 【招募】【新加坡】Digital ASIC Design Engineer

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發表於 2013-10-3 17:19:41 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
大家好,我是新加坡Uni Connect公司的獵頭,我叫周倩倩。我公司在新加坡為各大半導體、電子行業的客戶做技術人才招募已有15年經驗。請參考我們的網站:www。uniconnect。com。sg。(請自行將句號換為點)
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/ T& O/ a4 e& W% S現在有一個中國大陸的半導體通信、娛樂解決方案提供商在招募一個初中級職位,permanent position,工作地點是新加坡,待遇從優:
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Senior / Digital ASIC Design Engineer
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Responsibilities:
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•The Digital ASIC Design Engineer will be part of the team responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs. He/She will the responsible for the digital blocks including serial interfaces, control logic,  DSP blocks such as digital filters, feature detection logic and other digital application accelerators.
; R$ W9 E( S' f- ~2 K•The responsibility of the Digital ASIC Design Engineer includes scheduling, design, simulation, synthesis and layout of critical circuit blocks, including pre- and post-silicon verification.
" O) ~/ S9 M+ R•It is also expected that you will conduct periodic design reviews, including with application engineers.
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Requirements:1 n6 ~+ A& [* }9 ]0 Y- P/ L$ y

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•Master/Bachelor’s Degree in Electronics/Electrical Engineering. ! r" ?1 B9 {" f, i/ p
•Minimum 1 to 3 years experience in Digital ASIC design.
. q+ u- [1 F( x/ D' N4 }- ]  s4 R9 U•Very good knowledge of CMOS processes.
& y+ s6 A; ]$ x8 V! {" ?! ]8 o•Highly proficient in modern ASIC design tools, both frontend and backend.
& W, P: P* x; m! ]6 {! P1 Z, z•Experienced in design of I2C, SPI, control logic and DSP building blocks.
* P" o$ G. j0 Y•Skilled in laboratory testing of IC prototypes. 5 c2 o7 i' S+ s! Q
•Able to develop circuits from algorithm to synthesis.
8 r  R+ ]: l1 T4 w# |; i- Q" d0 \& U•Knowledge of Linux operating system required. # X' u$ N% L) v8 @, x, I4 I6 d
•Experience in MEMS interface ASIC design advantageous.
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2 R  N$ Z/ U. n& W4 p0 c請聯繫我電郵:qianqian@uniconnect.com.sg,Skype ID:zhou.qianqian.uc,或者直接撥打電話+65-63251262無時差。
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期待各位朋友來信!
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