|
這應該是APR的論文
u5 {$ L( [+ Y5 F9 b/ a# t2 p! x' U+ a; D, I4 d8 c( l# U
; R6 U' l/ Z" V" D+ r1 b
Abstract:3 ?1 T) i4 u% o
Parasitic interconnect corner methods are known to
7 k% O, U4 U5 z* \8 abe inaccurate. This paper explains the sources of their errors and: Q# c& o' o& i2 N( V2 c
shows that errors in excess of 22% can occur in the predicted y8 V5 @4 K3 a( _; U# Z
corner delays of a multi-layer stage in the presence of process$ _# ?$ R9 a0 k3 s4 [ j
variations. It is shown that exhaustive corner search methods are
* _4 V. f* s* [- H( minfeasible in practice as they have an exponential complexity in; Q( e/ Y0 F+ g
terms of required SPICE simulations with respect to the number0 c+ g/ E' W% t1 Z' j- l. q
of layers a stage is routed through. This exponential complexity: M- h4 `. T6 _: H: M
is reduced to a linear one with a new simulation-based search
4 d. H- ]; N* o0 L1 w& q A; @+ pmethod with the aid of stage delay properties. The ideas behind8 [* n! y$ I; \7 s# B" G
the simulation-based methodology are shown to be expandable
& w W: l# p! z/ J2 z9 |2 G( e; dto an analytical-based multi-layer performance corner location2 Y7 }1 \1 ?2 g) O
methodology. The simulated best/worst case delays based on these" B% ^( G9 D' ^, M( z
analytical corners produce errors below 4% as compared to the! w/ G. Z( P$ w; j' m6 e$ u9 J1 h
exhaustive search simulation based method.
% a3 _- |( F) l U% |2 O2 b8 L& }; ]- i5 |- [3 I
[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ] |
本帖子中包含更多資源
您需要 登錄 才可以下載或查看,沒有帳號?申請會員
x
|