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职位要求:
6 z0 u, ~. O, X7 f0 b2 Z; j, ORequired Skills The ideal candidate must have the following key requirements for this position: 4 Z- w, t; `4 }" ~) a
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• Bachelor or master’s degree in Electrical Engineering or related major. 4 F2 x- S* w- i, O w, o
• Five years of relevant IC layout experience.
1 J" r( j6 N: w0 [2 P• Strong background in analog layout.
) A+ X8 X8 X3 R& c% N0 i- s• Familiarity with Cadence tools (Virtuoso, Layout XL, Assura, Dracula). # N! ?! B: ]2 b/ m9 j3 s
• Layout experience with bipolar, CMOS, and BiCMOS technologies.
1 H, X1 S" }9 q& k• Working knowledge of Linux operating systems. , |" _ i* X' I6 N8 u9 E n. [5 k
• Experience with full chip layout including PG to the mask shop.
8 F! w, j5 j B# w1 D' A6 l6 x• Knowledge of semiconductor device and fabrication principles is a plus. . f- t2 I- ^+ ^3 h" x% s3 H* g
• Ability to work independently. 6 z7 }. h) V1 V5 k5 ^7 E2 s
• Great attention to detail, communication skills, well organized |
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