上个比较浅显on－chip ESD Design

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ESD专家 Albert Wang的Slides

3 n) e8 l" A: pON-CHIP ESD PROTECTION DESIGN
8 K% K7 X& T& C* ?$ T' }$ ?BY MIXED-MODE SIMULAITON
% C: I" V1 [3 I- `# aProfessor Albert Wang
Dept. of Electrical & Computer Engineering
Illinois Institute of Technology
% P4 z: {5 F. Q( u3 \; |0 e
+ v' K7 ?$ q) J6 ~( DOUTLINE
% O# y0 \7 O- y; j3 o• On-Chip ESD Protection: Basics & Solutions
• Mixed-Mode ESD Simulation-Design
  h2 f  S2 \/ _( ?: h4 ^. _• Practical ESD Design Examples
• New Challenges: RF/M-S/Whole-Chip ESD

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On-Chip ESD Protection for Integrated Circuits
An IC Design Perspective

  h" [" [2 z9 \' V6 H3 C1 \by
Albert Z.H. Wang
$ I, n! O5 h0 R/ p1 X$ N+ fIllinois Institute of Technology, Chicago, USA
, z$ m4 v1 n- B
Dedication.
, V+ G6 W& l! Z: ^5 NAcknowledgements.
Preface.
1. Introduction. 2. ESD Test Models. 3. ESD Pr
Device Solutions. 4. ESD Protection Circuit Solutions. 5. Advanced ESD Protection; Mixe
. p- \; w; E1 o8 U' rand Whole-Chip ESD Protection. 6. ESD Failure Analysis and Modeling. 7. Layout and Te
2 L" k+ @# J( {6 E$ JInfluences on ESD Protection Circuit Design. 8. ESD Simulation-Design Methodologies. 9
Circuit Interactions. 10. Conclusion Remarks and Future Work.
4 s7 {/ ~% z$ e; \$ q  bAppendix A: Summary fo
; A1 v+ Z* a# l* HStandards. References.
, Y% n8 i# o" |; }. k9 z% AAppendix B: Commercial ESD Testing Systems.
Appendix C: E
0 P: M; _7 `5 k) L; `! ^8 b' EProtection Circuit Design Checklist. Index.