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Field Applications Engineer7 U r3 c4 w$ N0 v) C
公 司:One world top EDA company
4 @7 Y5 O/ Z" b6 }7 q. Y工作地点:北京4 ~# s# }0 f9 q( e- S( W0 j8 f F
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Position Description: * I0 D8 w: w; v! ~) `/ M% g
- The Field Applications Engineer is responsible for working directly with customers in key technical pre-sales and post-sales roles to provide architectural and design consulting on the best use of Intellectual Property software programmable cores in various different applications including Wireless Communications, Audio processing as well as Image pre and post processing in a customer''s ASIC design.( _) K& _. f+ T x* @) {2 B
- DPU cores are used by the world leading semiconductor development and supplier companies. As the Field Applications Engineer, you will be working with customers on the next generation designs. In the Wireless Communications application, customers are using cores in their 2G, 3G, 4G (LTE and LTE-Advanced) modem systems for User Equipment and Infrastructure products. You will be working with industry leading customers on their next generation designs.
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Responsibilities:
3 s% _! X$ p5 k/ z' p { A/ W7 j- Provide technical presentations, seminars, and demonstrations of products, and working closely with the field sales organization to achieve revenue targets
4 s x) O: Z/ h( u# }! i- Fulfill a pre-sales role that includes providing technical insight about products to prospects, optimization of customer''s software code during an evaluation, and processor performance and implementation benchmarking
, _' N( L3 }8 l* W4 Q' H2 p- Manage technical accounts and champion customers’ technical issues within the company
+ K6 S" c& G# T9 [- E8 W- Primary responsibility for assigned areas and other duties as required
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Position Requirements:
; {; b. R. C9 L/ j$ `2 X- BS in EE/CS or equivalent and 6+ years’ industry and technology experience with 4+ years experience as a Field Applications Engineer or Applications Engineer
4 W _. Q( y) L; Y# J1 w- Experience with DSP architectures, DSP filter programming
- I. s1 Q& N* m _1 l7 X, d- Experience and understanding of 3G and 4G PHY (Layer 1) algorithms `5 Y# d3 i, r
- Experience and understanding of ASIC SoC design and implementation is a big plus
8 @* _0 A" q/ D& [4 b8 ~- Prior FAE/AE experience is desired. An MS in EE/CS is preferred. Some degree of travel may be involved, depending on location and need |
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