EDA戰雲密佈！RD戰力分析？

heavy91

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6/30/2010	SiS Adopts Cadence Technologies for Advanced SOC Designs
6/21/2010	Cadence Completes Acquisition of Denali
6/14/2010	Cadence Delivers Extensive Support for TSMC AMS Reference Flow 1.0 for 28-nm Process
6/14/2010 ) d1 d) d0 a, K2 f# ^' A4 ?	Cadence Delivers TLM-Driven Design and Verification, 3D-IC Design and Integrated DFM Capabilities to TSMC Reference Flow 11.0
6/14/2010	Cadence Kick-Starts UVM Adoption with Open-Source Reference Flow Contribution to UVM World
6/11/2010	Cadence Announces Comprehensive SOI Design Hub
5/24/2010	Cadence and IBM Team to Develop Leading-Edge IP
5/24/2010	Rapid Bridge LiquidIP Now Available as Part of Cadence Open Integration Platform
5/20/2010	Computer Simulation Technology Announces Closer Cooperation with Cadence
5/14/2010	Cadence to Acquire Denali
5/7/2010	Cadence Accelerates SOC Realization, Reduces Costs with New Open Integration Platform
5/3/2010	VIA's Centaur Achieves Significant Benefits Using Cadence Virtuoso Space-Based Router at 65nm
4/26/2010	Cadence Debuts Verification Computing Platform
4/21/2010 . s3 u# |- u) c  M4 F	Cadence Contributes Technology to Boost Verification of Complex Mixed-Signal Chips
4/14/2010	HiSilicon Adopts Cadence Mixed-Signal and Low-Power Technologies
4/14/2010	LSI Adopts Broad Range of Cadence Mixed-Signal Technologies
4/14/2010	TSMC Expands Cadence Tool Support In Integrated Sign-Off Flow By Adding Synthesis, Place and Route, and RC Extraction
3/29/2010	Cadence Teams with AcAe to Accelerate Transition to Allegro PCB Products
3/24/2010	Renesas Cuts Design Time by Half on Large-Scale Consumer SOC by Using Cadence Encounter Technology
2/2/2010	austriamicrosystems Expands Reliance on Cadence Technology to Achieve Seamless Mixed-Signal SOC Designs
2/2/2010	Cadence EDI System 9.1 Addresses Productivity Crisis for Complex SOC Design
2/1/2010	Cadence Software Validated on STARC QA Database
1/27/2010	Renesas Adopts Cadence Virtuoso Technology for Mixed-Signal and Analog Design
1/25/2010	Cadence OVM SystemVerilog Solution Enables More Thorough Verification at Mitsubishi Electric
1/25/2010	NEC Electronics Adopts Cadence Encounter Digital Implementation System for 40-nm ASIC Designs

heavy91

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Mentor Announces Commercial Linux Platform for Freescale Processors Based on Power Architecture Technology	6/23/2010
Mentor Graphics Questa Functional Verification Platform Adopted by Mindtree	6/21/2010
Mentor Graphics Extends TSMC Reference Flow 11 with Support for ESL and Integrated Design and Manufacturing Closure	6/17/2010
Mentor Graphics' Olympus-SoC Place-and-Route System Now Supported By X-FAB	6/17/2010
Mentor Graphics Provides Comprehensive Verification Support in TSMC AMS Reference Flow 1.0	6/17/2010
Mentor Graphics Working with TSMC to Speed SOC Verification with Calibre Automatic Waivers	6/11/2010
Mentor Graphics Announces Calibre xACT 3D for Fast and Accurate Extraction Using 3D Field Solver Technology	6/8/2010
Mentor Graphics Underscores Support for OVM and Extends Support to UVM Across Multiple Products	6/7/2010
Mentor Graphics Introduces Precision Rad-Tolerant Product for Advanced Radiation Effects Mitigation	6/3/2010
Mentor Graphics 0-In Formal Version 3.0 Brings New Level of Automation to Formal Verification	6/1/2010
Mentor Graphics Releases 0-In CDC Version 3.0 to Support Verification Needs of Larger, More-Complex Designs	6/1/2010
Mentor Graphics Announces New FPGA Synthesis Innovation in Precision Synthesis 2010a Release	5/20/2010
Mentor Graphics and NetLogic Microsystems Establish Strategic Multi-Core Collaboration for Embedded Linux	5/19/2010
Valor Releases Major New Functionality In the vSure DFM Product	5/19/2010
Mentor Graphics Veloce Delivers 400X Acceleration for OVM Driven Verification	5/7/2010
Mentor Graphics Calibre InRoute Delivers True Manufacturing Sign-Off During Physical Design Closure	5/3/2010
Mentor Graphics and Lauterbach Collaborate On Hardware-Accelerated, Software Development and Debug Platform for SOC Verification	4/27/2010
Mentor Graphics Selected as a Key Freescale Commercial Linux Strategic Partner for QorIQ and PowerQUICC Processors	4/26/2010
Mentor Graphics Announces Multicore Solutions for Symmetric and Asymmetric Multiprocessing	4/22/2010
STMicroelectronics Adopts Mentor Graphics Veloce Emulation Platform for Its New Generation of Set-Top-Box Chip Sets	4/15/2010
Mentor Graphics Extends DO-254 Platform Offering with Enhanced HDL Coding Standards	4/14/2010
Mentor Graphics ReqTracer Automates Requirements Tracking and Reporting for Electronic Design Projects	4/5/2010
Mentor Graphics and Platform Computing Optimize Use of Veloce Emulation Systems as Shared Resources	3/30/2010
SMIC Bases DFM Sign-Off Strategy on Mentor Graphics Calibre Platform	3/30/2010
Mentor Graphics Calibre LFD Certifications at TSMC Now Include 28-nm Process Node with TSMC UDFM Engine	3/23/2010
The MathWorks and Mentor Graphics Outline Joint DO-254 Workflow for Model-Based Design	3/23/2010
Mentor Graphics Acquires Valor Computerized Systems	3/18/2010
Mentor Graphics to Extend Cooperation with STMicroelectronics for Advanced Chip-Development Design Solutions	3/16/2010
Mentor Graphics Adds AMBA 4 Verification IP to the Questa Multi-View Verification Components Library	3/10/2010
Mentor Graphics Introduces FloTHERM IC for Semiconductor Package Thermal Characterization and Design	2/25/2010
Dongbu HiTek Adopts Mentor Graphics Eldo for Optimized Cell Characterization Flow	2/23/2010
Mentor Graphics Eases Android Development with Support of Inflexion Graphical User Interface on the Zoom OMAP36x-III Mobile Development Platform	2/15/2010
Mentor Graphics Enhances Signal and Power Integrity Solution with Full-Wave 3D Analysis	2/3/2010
Agnisys Announces Support for OVM Register Package in IDesignSpec	2/1/2010
Mentor Graphics Catapult C Adds SystemC Synthesis and Expands Full-Chip Capabilities	1/25/2010

heavy91

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SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization	7/14/2010
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100% Silicon Success	7/7/2010
ARM, IBM, Samsung, GlobalFoundries and Synopsys Announce Delivery of 32-/ 28-nm HKMG Vertically Optimized Design Platform	6/17/2010 9 Z) f2 M8 o/ U9 k
PrimeTime 2010 Scales Timing Analysis Beyond 500 Million Instances	6/17/2010
Synopsys Delivers Optimized Lynx Design System for Common Platform 32/28-nm Technology	6/17/2010 + W7 v1 J  M9 c- F. H
Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories	6/17/2010
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup	6/17/2010
Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/ Mixed-Signal Reference Flow 1.0	6/11/2010
Synopsys to Acquire Virage Logic + o7 n! z9 `" n' M8 f* Q) ]	6/11/2010
Synopsys and IEEE-ISTO Launch Technical Advisory Board to Evolve Interconnect Modeling Standard	6/7/2010
Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs ; n9 @9 F5 ^/ t9 P  r. f. S  h	6/4/2010
Synopsys Press Publishes "The Ten Commandments for Effective Standards"	6/4/2010 ! L" g3 _, N/ g4 L' A
Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65-nm LL Process Technology	5/13/2010 , ~8 T2 ~% {9 ]- e
Latest Synopsys IC Compiler Release Delivers More than 2X Speed-Up, Enhanced In-Design Technology and Production Support for 28/32nm ; O3 U  [% V+ R! u8 \: M6 W/ m	5/7/2010 % o5 y2 L: ?8 d+ N/ m
Synopsys Unveils Ethernet Controller IP with New Audio Video Bridging Feature 6 I( P8 N" X8 I/ A" u( v1 @	5/7/2010 4 A: R0 x+ z5 ?7 l: M# p! z+ E
Synopsys Launches Industrys First MIPI DigRF v4 IP	5/3/2010 * D7 w, [& b- n3 O
New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces	4/28/2010
Synopsys Announces Support for Actel's New SmartFusion Intelligent Mixed-Signal FPGAs	4/22/2010
Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems 3 _7 P3 C( z8 z! M7 w+ z3 A	4/19/2010 ' f5 j6 D8 ]- L. T) Z9 F
Synopsys Expands IP OEM Partner Program with Two New Members	4/14/2010
Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards In a Single PHY	4/7/2010 2 x; H3 W  I8 }2 a3 m
Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification 4 l0 `3 \, J( u: M  S2 A	4/5/2010
SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family $ \. @. u: m1 G5 F* R4 w	4/1/2010 # R+ w+ x% a  E
Synopsys Galaxy Implementation Platform Enables First-pass Silicon Success on Infineon's 40-nm X-GOLD 626 Wireless Product	3/30/2010 4 f4 k* n- \- }! y7 i- V  Y* M/ R5 u" R
Design Compiler 2010 Doubles Productivity of Synthesis and Place-and-Route 3 ]! ~+ X3 P0 l  q. @! r8 \; w	3/29/2010
Nationz Technologies Achieves First-Pass Silicon Success with CustomSim Mixed-Signal and VCS Functional Verification Solutions	3/23/2010 $ Z; ?* K5 `- p2 `5 ]) Z; [! s
Renesas Technology Adopts Synopsys Proteus OPC for 28-nm Development 4 k5 l3 z% [8 ^) a4 J+ z0 q- V	3/23/2010 ' Z( V8 o' n) `0 {: L2 i, W
Synopsys Completes Acquisition of CoWare	3/23/2010
IMEC and Synopsys Collaborate on 3D Stacked IC Development	3/10/2010 ' O7 F0 @. V4 H& ~! T  a
Synopsys Galaxy Custom Designer Accelerates Analog/ Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction 3 v7 ^" G7 }# B1 q- p9 [	3/10/2010
Yamaha Tapes Out Graphics Chip with Synopsys Design Compiler Graphical	2/9/2010
APAC IC Adopts Synopsys Galaxy Custom Designer Solution for Analog/ Mixed-Signal IC Design Services	2/8/2010
Synopsys to Acquire CoWare 9 a8 m2 [! m" n9 W' r$ j; E. B8 `	2/8/2010 # F8 W: G7 |1 M* K
Synopsys Acquires VaST Systems Technology & N, u; a3 i! v6 V	2/3/2010
Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions , `% g9 S$ J8 p9 V6 V- n; W+ z	1/25/2010 , P8 ?7 I$ r' o2 z$ n' I  e
Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies % ]) m8 c$ F& z	1/25/2010 4 |7 A" c6 g% Q; W/ V
Toshiba Information Systems Standardizes on VMM-LP Low-Power Verification Methodology : e) U! t3 C! t/ \6 a& ~7 X	1/25/2010 6 L! B" \& H! W
Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs : H8 M6 `% Q; |: P! o	1/13/2010
Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models	1/12/2010
Synopsys Multicore Technology Speeds Timing Sign-Off by 2X	1/11/2010