|
AMD Geode LX 800@0.9W處理器 II
Display Controller
9 O$ i6 `" r/ A7 n+ A8 B, e■ Hardware frame buffer compression improves Unified9 O- _. P/ W1 ]/ ~' x$ Q) s1 I
Memory Architecture (UMA) memory efficiency$ n$ W8 i- v* |( J3 E8 j
■ CRT resolutions supported:( F% u' t' a0 e. ~: l- a8 ?2 z
— Supports up to 1920x1440x32 bpp at 85 Hz- ]! F# g+ B7 x. P- ]
— Supports up to 1600x1200x32 bpp at 100 Hz
" }$ d; d1 m+ {* ?■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT
2 {" N+ t( V6 L7 ?% O! I■ Standard Definition (SD) resolution for Video Output
, K& v2 h3 q! D5 H1 D2 H O5 iPort (VOP):# d( E$ k1 ]% ~" N" D6 c1 O8 L) D x
— 720x482 at 59.94 Hz interlaced for NTSC
& e! A8 S+ y/ s( ]$ g— 768x576 at 50 Hz interlaced for PAL6 u4 u# ]: _* D1 ]7 i
■ High Definition (HD) resolution for Video Output Port
6 X4 Y: ]' w3 G(VOP):5 E( z# K9 R+ z
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
( s6 h! ]8 `% L) q# v4 b& L(74.25 MHz)
& v6 L/ ]5 Y& h0 T— Up to 1280x720 at 60 Hz progressive (720p HD); M( P3 h ?1 T& @% H
(74.25 MHz)- v; l, S) s. l" @; a
■ Supports down to 7.652 MHz Dot Clock (320x240
2 ]0 F2 t+ `) iQVGA)
! y$ r: M- I( S- j' a% K6 e1 o s■ Hardware VGA$ G; \ W" T0 g6 x. v
■ Hardware supported 48x64 32-bit cursor with alpha9 U; f8 }* f1 \* G! d
blending9 ]5 r3 E* k( ^! g
Video Processor' t1 r( {8 H, Y! Y; J1 t
■ Supports video scaling, mixing and VOP C) N) Z, ?4 k
■ Hardware video up/down scalar
/ o* s5 L6 g1 L; V+ a3 M■ Graphics/video alpha blending and color key muxing
: k" \! I# A, F/ S. i■ Digital VOP (SD and HD) or TFT outputs7 L4 O' I/ {( R. `4 J: g N
■ Legacy RGB mode
' E' r$ m; W+ x5 b" }' s6 W■ VOP supports SD and HD 480p, 480i, 720p, and 1080i/ Z3 H4 r! O, b& h" N s
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656. M! C( X9 D# z) c) h- f$ O
compliant
+ F* B1 G- u ~% @Integrated Analog CRT DAC, System Clock PLLs and
, g1 r5 U4 r( {$ \- T1 D7 P# TDot Clock PLL; o8 }) y# X0 l6 a ^5 [
■ Integrated Dot Clock PLL with up to 350 MHz clock0 b( ]0 F; s4 W
■ Integrated 3x8-bit DAC with up to 350 MHz sampling! y; E$ `7 a3 X8 b* g- g
■ Integrated x86 core PLL
! _! N$ M2 X, P+ I3 S& K■ Memory PLL) r: u$ F4 J& `: u U4 g* |" a/ {9 u
GeodeLink™ PCI Bridge
1 w/ f$ |. X6 \6 `1 `1 U9 L- \■ PCI 2.2 compliant1 T- P* q9 d$ E# n
■ 3.3V signaling and 3.3V I/Os
3 P& a! b& U, S X0 [8 L■ 33 to 66 MHz operation; U1 V; }5 B; S1 x5 k
■ 32-bit interface
z# m: }- k! t6 Y1 W■ Supports virtual PCI headers for GeodeLink devices$ R1 n; U9 ?0 ~; T. U
Video Input Port (VIP)
! L0 y- W2 g( u8 w% s■ VESA 1.1 and 2.0 compliant, 8 or 16-bit! ~4 L+ U n1 l; q/ j' R! _* {
■ Video Blanking Interval (VBI) support
1 L7 _/ }6 a: \5 E" x" h■ 8 or 16-bit 80 MHz SD or HD capable
5 {. N% b, k" c& z: Y, P0 p- eSecurity Block
* z/ c- r6 f) g( a, G9 j8 U" w■ Serial EEPROM interface for 2K bit unique ID and AES
4 p [% t; ~& t% v/ N. i2 g(Advanced Encryption Standard) hidden key storage& I2 J, Y t( M! F: g
(EEPROM optional inside package) R8 y4 c( q. |/ u; n, d" i% j
■ Electronic Code Book (ECB) or Cipher Block Chaining6 W. {3 `4 X1 _5 V B
(CBC)128-bit AES hardware support
; v& ~ N8 i u2 P% F8 ~■ True random number generator (TRNG) |
|