某半導體大廠徵求Project Leader

chip123

某半導體大廠徵求Project Leader         
  g, J: \% Q! H! c- K$ @; @
Title Responsibilities：       

1. Coordination among CIS integration, module and product for next generation technology development
) F! J0 i1 S4 I2. Responsible for WAT analysis and pixel performance characterization.                                                                          
5 A4 I  i6 f- z0 {' x- h3. Experiment design to optimize pixel performance and establishment in process baseline.       

* I) F6 {6 ~+ Y/ [) L1 `1 |Requirements：
4 \" K; x6 P* O! _) [
- u' E6 j6 n% [' E* G2 T. d5 G1. Minimum bachelor degree in Electronics Engineering or related fields.
2 d8 b$ |+ ?4 }$ a. M& P2. Minimum 6 years of experiences in Memory product (DRAM, SRAM, CIS, NVP)
4 a  A6 ?6 ~  d# k( P3. Candidate with integration experience are preferred.
4. Fluent in English.
5. Work location in Tainan, Taiwan.

Package： around annual NT 300萬 ~700萬

( o: d5 h9 ?+ R$ r$ _4 k, j. X: cStock：providing stock option depends on experience

意者請與 chip123@chip123.com.tw  聯絡！