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You can find a possible solution as the attached paper./ h8 z/ u b4 v4 D
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Chi-Nan Chuang and Shen-Iuan Liu, "A 1V phase locked loop with leakage compensation in 0.13um CMOS technology", IEICE Trans. on Electronics, vol.E89-C, pp. 295-299, March 2006. 7 d( L0 U! [9 H; @$ b% \& i& T( H# R. k5 F( A& S) d http://www2.ee.ntu.edu.tw/~ecl/Professor/Professorpub.htm#(A).%20Journals 9 \- L, w7 \) Z3 F& Q) y9 W' g$ c, h# Y
Good luck.