06/12 Jisso International Forum

jiming

工研院『先進微系統與構裝技術聯盟;AMPA』為促進與日本構裝產業先進作技術交流，特別邀請日本JEITA(Japan Electronics Information Technology Association)產業聯盟的4~5位專家學者於6月12日來工研院作構裝技術發展之論壇，論述議題內容包括日本之構裝技術藍圖(Technology Roadmap)，以及基板與3D IC等技術最新發展狀況，同時，邀請全懋科技之許詩濱副總經理及電光所之駱韋仲組長就國內基板與3D 構裝技術作報導，歡迎從事IC構裝、系統組裝與電路板等產業或對此課程有興趣者報名參加！

時    間：96年6月12日（星期二）9:30至15:00
地    點：工研院51館4樓國際會議廳 (新竹縣竹東鎮中興路四段195號，電話︰03-5918062)
主辦單位：工業技術研究院電子與光電研究所
協辦單位：先進微系統與構裝技術聯盟
http://epkg-mems.org/memb/SeminarView.aspx?SeminarId=52
議
程：

8:40 - 9:00	Registration
9:00 – 9:30	Welcome and introduction of ITRI, EOL and JEITA
9:00 – 9:15	1. Welcome and ITRI introduction Dr. Chan, Acting for Vice President and General Director, EOL/ITRI
9:15 – 9:30	2. Introduction Hisao Kasuga, Vice Chair, JJTR (NEC Electronics Co., Japan)
9:30 – 11:50	Technical Presentation of JJTR2007
9:30 – 10:00	3. Topics 1 of JJTR 2007: Topics of Electronics Products Hirohisa Matsuki, Committee, JJTR (Fujitsu Limited, Japan)
10:00 – 10:10	Q & A
10:10 – 10:30	Break
10:30 – 11:00	4. Topics 2 of JJTR 2007: Topics of Substrate Mr. H. Utsunomiya, Vice Chair and Leader of Substrate section, JJTR (President, Interconnection Technology Inc., Japan)
11:00 – 11:10	Q & A
11:10 – 11:50	5. Topics 3 of JJTR 2007: Semiconductor Package(include 3-D IC ) Ryo Haruta, Leader of Package section, JJTR (Renesas Technology Co., Japan)
11:50 – 12:00	Q & A
12:00 – 13:30	Lunch
13:30 – 15:00	Technical Presentation of ITRI & Taiwan Industry
13:30 – 14:00	6. 3D Chip-to-chip stacking technology Dr. Lo, Director, EOL/ITRI(Taiwan),
14:00 – 14:10	Q & A
14:10 – 14:40	7. Advanced Substrate technology Mr. Hsu, VP, PPT(Taiwan)
14:40 – 14:50	Q & A
14:50 – 15:00	8. Closing Remarks Dr Chan, EOL/ITRI, Taiwan