A Layered Verification Approach Applied to an AMBA-Based System

phoenixfeng

It’s common knowledge that the verification
stage for a given system is
around 70% of the overall design
effort and schedule time. Reducing
overall time spent in test creation and
4 `5 U. R; c2 m2 Ddesign verification is a high priority.
Success in these two areas increases
productivity and helps deliver products
! d* t. q" e+ \2 v, S2 W; o. T, Pto market faster. To achieve these verification
; ]" f; N: h% L- sgoals, engineers are constantly
) r9 v* A6 v8 e# flooking for new and innovative ways to
: I1 a) l! A0 B6 hconquer the verification challenges that
face them.
" ~: B  Z3 N/ s7 j: HThis article discusses a layered verification
$ G5 g* S0 G" N4 E+ Q# ]0 r, G( uapproach as applied to an AMBAbased
system component. The layered
8 p4 n- T, G9 [approach is used to create a standardized
verification environment that can
adapt as the design challenges
6 @% y) ^" U: v* V+ Eincrease. Typically, reuse is very high
$ k2 p0 E. c3 @$ m9 t$ d# J- _within an AMBA-based system because
3 d; E3 F, C9 h8 nmany new designs are based on earlier
versions of the standard system. The
example shows the layered approach
being applied to verify an individual
block as well as its integration into the
, E: W* u; c- msubsystem and final system representation.

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