A Layered Verification Approach Applied to an AMBA-Based System

phoenixfeng

It’s common knowledge that the verification
  G& r+ q. E, t& ]/ c4 Z3 b: N" Estage for a given system is
around 70% of the overall design
effort and schedule time. Reducing
& L1 S9 }5 d/ R2 @+ Y0 Ooverall time spent in test creation and
3 U# T) @& K: Q& s7 u4 vdesign verification is a high priority.
Success in these two areas increases
productivity and helps deliver products
( {$ w* D  d& C( T* kto market faster. To achieve these verification
* r0 M. p. S( Q; u/ k* Cgoals, engineers are constantly
looking for new and innovative ways to
. `5 s7 m- |  U; y7 T& T: Iconquer the verification challenges that
face them.
This article discusses a layered verification
approach as applied to an AMBAbased
system component. The layered
) R0 l2 t5 U5 y" Bapproach is used to create a standardized
0 M, G2 |% H- x6 s! ~! Overification environment that can
: A' p/ }% H, \' y$ Ladapt as the design challenges
increase. Typically, reuse is very high
( q' `4 @! V7 }# m6 n6 b2 O. Fwithin an AMBA-based system because
many new designs are based on earlier
versions of the standard system. The
example shows the layered approach
being applied to verify an individual
; p$ z5 T9 ?+ Iblock as well as its integration into the
subsystem and final system representation.

femark

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