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A Layered Verification Approach Applied to an AMBA-Based System

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發表於 2007-7-5 09:27:40 | 顯示全部樓層 回帖獎勵 |倒序瀏覽 |閱讀模式
It’s common knowledge that the verification
9 w0 F& _# [: z9 \) Xstage for a given system is$ s; L' Z* |3 b7 I
around 70% of the overall design
3 w4 d& ~6 P# T5 Veffort and schedule time. Reducing
+ H# F0 \9 p. hoverall time spent in test creation and/ S2 Q, r: w6 M% X) c+ K( n  v' i
design verification is a high priority.
( l6 a" N2 y; h& z' pSuccess in these two areas increases" X/ f- K% L; D: t! y4 A  V
productivity and helps deliver products
, H, ~8 l2 l9 Z2 [/ J/ X2 b; zto market faster. To achieve these verification/ g/ X2 T+ o7 Y4 \9 y# _8 p& c
goals, engineers are constantly
. p2 ~2 d- _) H7 plooking for new and innovative ways to
7 W" k. F$ s& ~+ C) }" `; h8 I! Fconquer the verification challenges that/ d3 b8 |+ C# ?0 g+ H. A: Y
face them.. r5 s- O4 O1 Y4 X. ?! B
This article discusses a layered verification( Z$ F6 o6 z' {% {3 p5 N
approach as applied to an AMBAbased
# C" Y* Z" E- [  [( p9 u* Y2 h7 W7 Hsystem component. The layered
& g& V* ]% y4 I6 Y4 Y; |approach is used to create a standardized
3 i  b/ {3 [( ^9 M: mverification environment that can
8 N9 r  d2 A1 K) T2 m; {adapt as the design challenges0 [  a  w7 I' Z( l
increase. Typically, reuse is very high
2 D7 J5 ]* }: _8 V3 b9 }within an AMBA-based system because
0 d( E5 f9 W: U* c' b- r$ q1 pmany new designs are based on earlier7 }, Q) M8 x% i; n5 @
versions of the standard system. The! f7 L: U1 m* _. m' j5 C- H1 C
example shows the layered approach
* ?8 H' u/ P; u/ Q! Jbeing applied to verify an individual
" J# [9 z" M3 z1 nblock as well as its integration into the
; u3 A% b2 P. `  V$ o! U& ~* bsubsystem and final system representation.

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