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Sponsor3 Q( h( U/ s) w j# U
Test Technology Standards Committee of the IEEE Computer Society
, s% M; @0 { s$ u1 c" }; @Approved 14 June 2001) D# o% b% T% ^4 Y% R9 \) v
IEEE-SA Standards Board! T1 Q* @$ Q" b0 U7 m
Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
: s3 |+ u8 w+ m1 \7 Usupport of assembled printed circuit boards is defined. The circuitry includes a standard interface4 k( k/ l& ]2 B$ H* _5 t
through which instructions and test data are communicated. A set of test features is defined,) v c$ L! \$ Y8 V
including a boundary-scan register, such that the component is able to respond to a minimum set- d* j3 t) b/ X3 d
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language) z o! h1 p% n& j! y0 K5 K& `. J* c( N
is defined that allows rigorous description of the component-specific aspects of such testability features.! U3 A: ?- w/ K8 {2 A% _" _6 y
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Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
9 d( \5 r2 B/ d% ]- c1 o+ Rboundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
5 k8 k/ [- D+ H; o8 TTAP, test, test access port, VHDL, VHSIC Hardware Description Language& S4 `1 T2 y s k. B" }
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