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Sponsor3 G. z! e8 |, o1 N1 [
Test Technology Standards Committee of the IEEE Computer Society& L9 ^0 U3 }2 d {1 }8 x
Approved 14 June 2001
2 A9 w) D/ p3 f/ Q @IEEE-SA Standards Board$ ~) E, \# N, V$ }4 r6 H6 P
Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and8 D# G6 v6 X4 E6 p
support of assembled printed circuit boards is defined. The circuitry includes a standard interface
4 o# H! X# }- P( ]- Mthrough which instructions and test data are communicated. A set of test features is defined,
7 ]+ i3 v" D* u( K; A& l8 X1 K" J9 `including a boundary-scan register, such that the component is able to respond to a minimum set+ ~- z2 G% s" Q0 {, o9 ^! k
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language4 p0 k. Q6 J0 w8 z
is defined that allows rigorous description of the component-specific aspects of such testability features.; s5 y3 ?2 l6 C
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Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,5 e9 g X0 e+ y9 ?
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,8 R9 Z9 l5 b% f( _
TAP, test, test access port, VHDL, VHSIC Hardware Description Language
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