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Job Title :Analog Design Engineer6 |/ {; ~, [/ C' }
Job Category :Semiconductor
+ w5 ]; J0 q# O3 i9 M3 c: r J" wLocation : Malaysia: [% C) |/ r$ A4 r6 i6 x& @
Job Type : Permanent
% Q6 ^6 ]' ~5 ?Job Description:
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2 S# l, _' R9 A) Y. \0 Q. e. R- yAnalog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.
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$ G. k6 |3 c8 ]& pResponsibilities:
3 }7 e. U! o5 Y. i6 v* F3 H5 EInteraction with customer to understand customer requirements, develop product specification and to provide technical support.
! @" S2 r* d9 @# OClose interaction with the design team.
% ]9 m* r( q! W; }Support and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.7 p: q: i) H9 ~3 f2 U. @ L
Maintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.
3 _% Y- I. p6 p4 T; A( c& vRequirements:% h2 ~! L9 _7 X% ]# m
In-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV
# N# R) F: A0 c9 B+ tExperience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc" ~* A' i: J1 [# @
Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.* s O8 s$ W" S# Q3 J. ]9 C
Detailed knowledge in the design and operation of the following analog blocks:& p! E! Z7 k1 V; b3 `0 q' `
- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)( c- R/ N$ l* H1 G: \& _
- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)# |* f% \5 r* Z( r
- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc)$ h0 K' d0 y) x8 `0 l
- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)1 V. K, H7 N: h& l3 G2 T8 s* F
- ADCs and DACs% B* X9 T- k" S# T9 L- \& ]% ~- m
Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.' J, @$ e* i5 R G4 ~% {1 x
Modelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
0 u- I/ `: b& |1 Q$ D2 `A track record as a team player and capable of leading teams8 T7 `' B9 D, O
Proven experience in developing and meeting engineering schedules
/ q2 W. ^9 C) l1 WStrong analytical skills
C7 r+ H( ~$ H( }+ @' `Strong organizational, interpersonal, written and verbal communication skills. |
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