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Job Title :Analog Design Engineer
* K. X0 Y5 ?* m8 x% iJob Category :Semiconductor
4 i! w- m- }) B5 f. F* iLocation : Malaysia* F. Z! v$ {" q
Job Type : Permanent; e) b" ?, Y# H7 n7 c! y
Job Description:- F; J P4 P/ X2 Y6 J; d
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Analog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.
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; w/ {; `0 N1 S8 iResponsibilities:' C8 l, O5 F2 _; q( V5 H# h. X# \
Interaction with customer to understand customer requirements, develop product specification and to provide technical support./ T }. G3 H0 r5 m" j- N) m7 D
Close interaction with the design team.2 E8 R/ l, M3 x, E5 K- J
Support and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.% T" b; S0 H4 W. I- C# F+ S
Maintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.
: g+ Y$ p. R$ \, S- BRequirements:
. w# V5 ?' M3 S0 v" U, O/ |! nIn-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV: O" u7 _2 D- K# v" t0 Q
Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc* [2 l$ H- R! }& F7 V7 D& ~
Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
5 z/ g1 @, o X1 F" _) FDetailed knowledge in the design and operation of the following analog blocks:
! A7 q5 |; F1 P" }- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)
/ w1 F/ P5 \* Q4 d8 s- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)
4 B, |7 i' _7 |- E8 \/ `- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc)
! V7 d1 G' m: F. F( J8 K7 K- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)
5 b1 q8 ]4 r& V2 b/ C- ADCs and DACs
$ Y; m5 h2 _$ [& G1 |Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.
( E( _& b G4 D+ [1 k3 eModelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.+ _% b/ ?. d. Z- _3 a
A track record as a team player and capable of leading teams; A9 Z. \6 }# T1 v
Proven experience in developing and meeting engineering schedules
l0 M' x3 s" BStrong analytical skills
8 M R* ?6 ~' e6 ~1 y! sStrong organizational, interpersonal, written and verbal communication skills. |
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