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Job Title :Analog Design Engineer; y8 J7 _9 k8 o5 R& `9 R: L
Job Category :Semiconductor
/ L1 E. p9 L5 i9 w0 p9 gLocation : Malaysia
: ~4 B2 I# U8 M+ HJob Type : Permanent
0 k" g& L# u, [7 u. t$ @5 i+ DJob Description:
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: g7 N# N. W1 H& i7 O& f2 M/ a. CAnalog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation., h8 h$ V" N8 _. b+ j' ?
* \. z9 F. ]6 }# j$ f3 mResponsibilities:6 T1 a7 I {. c7 q7 n
Interaction with customer to understand customer requirements, develop product specification and to provide technical support.) Y. k# t4 ^- n+ u- U
Close interaction with the design team.
; F9 g- ~" g: o2 ZSupport and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.! f. c: w5 w) P! [9 C7 v
Maintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.5 [1 k( `- C1 F. b/ [9 |
Requirements:. q2 h0 E# O, K$ Y/ ]4 I
In-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV1 m! o8 s0 N% `5 s! Y; b/ ]
Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc
7 z" h. P8 Z8 @' O" L a6 ZUnderstanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.5 b' c5 S c1 P5 i
Detailed knowledge in the design and operation of the following analog blocks:
, {- Q9 z5 u- d- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)
) \: R& p3 V0 X% J! w# C' G$ p3 Y( u% I- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)1 F6 W( n$ ^5 l) O% k7 b
- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc), ~% E1 g% ]; L* ^: N1 \/ ^
- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)8 ?2 |- A' L" k: T y7 o7 B
- ADCs and DACs4 b( a' C e' \
Experience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must./ x! X' Q1 c7 b1 I
Modelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
; R. c* C5 p8 k6 x2 `A track record as a team player and capable of leading teams/ I5 A6 O+ w* d
Proven experience in developing and meeting engineering schedules
1 s# n) c* n8 u$ u* |Strong analytical skills
) l! O% a7 ]% h; n; C& q3 h- F) lStrong organizational, interpersonal, written and verbal communication skills. |
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