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Job Title :Analog Design Engineer$ J ?3 a9 |* R/ b$ Q3 G
Job Category :Semiconductor& A" g* Q5 q4 d+ d9 X- r: i- S
Location : Malaysia
% ~5 w4 B% j0 r7 Q: c/ E. o4 N( Q1 EJob Type : Permanent0 a5 w% e$ U; b$ z! B3 A) [0 R8 H3 Y
Job Description:/ C/ o) _9 Z( F$ `$ t$ W2 [4 `
9 U4 y: H" s9 P: d4 f& uAnalog IC Designer to for all technical aspects of design from feasibility to specification to monitoring layout of the design, tapeout and silicon validation.
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Responsibilities:
! m7 D4 ?$ j; j; I4 QInteraction with customer to understand customer requirements, develop product specification and to provide technical support.
( v1 k3 F3 j! D+ g2 W! @7 _1 eClose interaction with the design team." L' c. ? P7 H1 Y) o8 E4 T% h
Support and guide the layout team. Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.
8 k: |: B' ~% f) J& m! NMaintain proper documentation throughout projects including a detailed test plan for the validation of the design/IP.
q9 m6 x {7 P0 g1 P3 [" lRequirements:3 L2 g5 K. i0 C# C- E0 X4 k+ D. ^
In-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV
' E+ }9 F% r) ~4 J: B: |; @: ]Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice etc# g3 `9 v2 V! r7 v
Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
& t% I9 N' T* b" C! L# vDetailed knowledge in the design and operation of the following analog blocks:" {' A" g; [6 s* v! X
- Basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)- p& G3 n9 M- v( d
- Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs)
. J$ N5 \" g$ h3 e- w1 Z1 N* q- System level protection blocks (UVLO, POR, OTP, Short circuit protection etc)
2 p' Z/ b0 j7 p8 g/ |% C4 F- PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters)) F' `0 u# @8 S# J6 i8 b; B
- ADCs and DACs
" x `! a! |! Q% S$ f3 _; {0 gExperience with design practices such as minimizing device mismatch, noise, signal coupling, ESD, latchup and device SOA is a must.$ b% P: O. C T$ ^6 J
Modelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.+ O6 h5 Q1 y- L4 _' ?
A track record as a team player and capable of leading teams7 _) x& g% T7 c0 y
Proven experience in developing and meeting engineering schedules
4 X' _9 u/ O6 \; I$ E) ?Strong analytical skills2 |$ E. p1 j9 d8 o" `
Strong organizational, interpersonal, written and verbal communication skills. |
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