SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization | 7/14/2010 |
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100% Silicon Success | 7/7/2010 |
ARM, IBM, Samsung, GlobalFoundries and Synopsys Announce Delivery of 32-/ 28-nm HKMG Vertically Optimized Design Platform | 6/17/2010
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PrimeTime 2010 Scales Timing Analysis Beyond 500 Million Instances | 6/17/2010 |
Synopsys Delivers Optimized Lynx Design System for Common Platform 32/28-nm Technology | 6/17/2010$ J! R n5 n6 H; G% J
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Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories | 6/17/2010 |
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup | 6/17/2010 |
Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/ Mixed-Signal Reference Flow 1.07 \0 Z2 r6 {& U* s4 ]
| 6/11/2010
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Synopsys to Acquire Virage Logic ; f, I+ }& Z" Y) s b, G& U
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Synopsys and IEEE-ISTO Launch Technical Advisory Board to Evolve Interconnect Modeling Standard
, ~9 i# c/ j, S" `, i) C i/ b( o | 6/7/2010
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Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs
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Synopsys Press Publishes "The Ten Commandments for Effective Standards" % P& D$ c8 B! p9 a4 g5 K
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Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65-nm LL Process Technology : A7 l( w: f) |/ Q
| 5/13/2010 / g( r( k% l/ p: C7 ]; X. E
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Latest Synopsys IC Compiler Release Delivers More than 2X Speed-Up, Enhanced In-Design Technology and Production Support for 28/32nm . R/ n }; o! g1 c, l/ u' Q( _' A( t
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Synopsys Unveils Ethernet Controller IP with New Audio Video Bridging Feature
9 [9 c3 t+ ?/ E2 t1 x5 T2 j$ n | 5/7/2010 , R8 w$ c% x) R- B: l+ u
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Synopsys Launches Industrys First MIPI DigRF v4 IP
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New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces
! X1 Y4 k1 n% r | 4/28/2010 - h# w, D: E A- Y% o& {# f
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Synopsys Announces Support for Actel's New SmartFusion Intelligent Mixed-Signal FPGAs
5 c' P# R' |; k | 4/22/2010
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Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems 6 u5 c1 p5 J6 z2 G
| 4/19/2010
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Synopsys Expands IP OEM Partner Program with Two New Members
/ R! e2 W% E4 L5 ~/ n9 [ | 4/14/2010
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Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards In a Single PHY
2 G; X# f/ u9 n- P | 4/7/2010 2 E3 a* `8 [/ j
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Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification
( C$ b. F7 R' |$ V | 4/5/2010 , `) {8 e: P% {' A7 m
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SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family
" u. v' P$ w$ z+ V3 V! v' N6 g, F: Q& ~/ W | 4/1/2010
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Synopsys Galaxy Implementation Platform Enables First-pass Silicon Success on Infineon's 40-nm X-GOLD 626 Wireless Product & ?) V) g9 z7 ~$ D' [
| 3/30/2010 ! H# p" `! y8 g; g0 J
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Design Compiler 2010 Doubles Productivity of Synthesis and Place-and-Route
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Nationz Technologies Achieves First-Pass Silicon Success with CustomSim Mixed-Signal and VCS Functional Verification Solutions ) B) _, L- b$ Q# w0 w
| 3/23/2010 2 G/ d( P& ~* j# y9 K- v
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Renesas Technology Adopts Synopsys Proteus OPC for 28-nm Development ! o! ]! ^. u- Z7 J
| 3/23/2010
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Synopsys Completes Acquisition of CoWare ( p8 U% A8 M; v+ N9 |
| 3/23/2010
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IMEC and Synopsys Collaborate on 3D Stacked IC Development " ^- b7 g- Z1 Y7 x7 p
| 3/10/2010
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Synopsys Galaxy Custom Designer Accelerates Analog/ Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction
" C2 F7 R) u8 [% r" T2 J/ h% T- Z) L | 3/10/2010 8 U0 y0 S) `) F5 ?* d5 Q' Y
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Yamaha Tapes Out Graphics Chip with Synopsys Design Compiler Graphical
: z- K0 F2 t& _* x3 \5 Y | 2/9/2010
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APAC IC Adopts Synopsys Galaxy Custom Designer Solution for Analog/ Mixed-Signal IC Design Services 2 R* a0 h. V& p. E& r
| 2/8/2010 $ N* H& t K7 q. f- B6 K
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Synopsys to Acquire CoWare # e" A! |+ Q( ^( E V
| 2/8/2010 8 i6 s! H' d8 f! B
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Synopsys Acquires VaST Systems Technology 1 k. U* U. y2 D& T1 P+ ?! L! P
| 2/3/2010
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Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions 7 ]( ?" R( r4 P6 D: v: }1 ~: o# P& J
| 1/25/2010
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Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies ; S: \% N# M3 D6 a
| 1/25/2010
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Toshiba Information Systems Standardizes on VMM-LP Low-Power Verification Methodology
n I% j& |" s' n( b$ \ | 1/25/2010 & d/ j5 N" Q* U9 F: }9 b* i& [1 E% |
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Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs
p: K6 r$ O3 f3 J& Y | 1/13/2010 - F, t, v1 V% ~: a# _! U- ^
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Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models
7 `8 {9 b, @8 q1 B& C) g2 @ | 1/12/2010 + D* R# n/ E, b4 f$ j: J8 R
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Synopsys Multicore Technology Speeds Timing Sign-Off by 2X 3 ]0 G, x% P. Z# a( _
| 1/11/2010
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