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AMD Geode LX 800@0.9W處理器 II
Display Controller0 L* T. y4 D5 G! q* L
■ Hardware frame buffer compression improves Unified) L- r2 w6 t' R j) D
Memory Architecture (UMA) memory efficiency, y! R# O' y# T$ [! m3 l% [& J
■ CRT resolutions supported:
3 L* I y% q; w, i* @— Supports up to 1920x1440x32 bpp at 85 Hz
: E$ ~: ]. ?8 L4 y— Supports up to 1600x1200x32 bpp at 100 Hz' ?% p- ?! ^) x/ P2 E) m# A
■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT
0 r' x- Q; |# ?. n■ Standard Definition (SD) resolution for Video Output
' W7 [/ t! J' l4 u1 N2 `Port (VOP):
, y! R" C7 q e% g— 720x482 at 59.94 Hz interlaced for NTSC
2 X; }& M1 d, n: _, m/ T— 768x576 at 50 Hz interlaced for PAL5 A9 q7 C6 k2 ?* h5 ~! u: z
■ High Definition (HD) resolution for Video Output Port+ I5 g+ |2 H. H7 C& F
(VOP):
1 a/ O$ R* G8 U u— Up to 1920x1080 at 30 Hz interlaced (1080i HD)8 r9 I% `( Q& [) @, V# t4 n* K1 Q! @
(74.25 MHz)0 {: D: B' Y) a: A0 p9 H
— Up to 1280x720 at 60 Hz progressive (720p HD)% O& o, Q! H1 D) ]+ ?% T/ O
(74.25 MHz)
7 u2 G, j( ]: f' M- p■ Supports down to 7.652 MHz Dot Clock (320x240
9 O% o% g# B9 b- `& bQVGA)* g& S3 {) x! ?, x' X6 w
■ Hardware VGA; D4 d% S3 P3 k2 c0 ]
■ Hardware supported 48x64 32-bit cursor with alpha
: @$ I* U' }5 H* x8 t) U9 ?7 D* pblending0 ]2 X% d. U( }# U4 T2 g
Video Processor
; y, \8 d* R7 G6 U _6 l2 O- Q% z+ a■ Supports video scaling, mixing and VOP
9 O ^* @* V, _0 ^# T& e# \■ Hardware video up/down scalar" L5 p1 b7 |& r) K3 @
■ Graphics/video alpha blending and color key muxing( F* m8 ~) S, H! I k
■ Digital VOP (SD and HD) or TFT outputs u) w1 H; C$ i, M/ Q
■ Legacy RGB mode
* W8 M# f. y! a■ VOP supports SD and HD 480p, 480i, 720p, and 1080i& \5 ^' v3 @+ ~8 ^% ] L8 c
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.6567 W. l5 M! E6 A: q2 z
compliant9 d9 M! B2 e, d
Integrated Analog CRT DAC, System Clock PLLs and( l' W9 w% {( r! d' J' I! a
Dot Clock PLL
* y3 ]& m4 X* h# L■ Integrated Dot Clock PLL with up to 350 MHz clock
( ?6 E$ t, g) C7 Q■ Integrated 3x8-bit DAC with up to 350 MHz sampling v& j$ T, ]7 A
■ Integrated x86 core PLL
. Y0 g" ^, Q, W9 U1 v% Y■ Memory PLL
6 p: e0 e" A) a, T {. j VGeodeLink™ PCI Bridge
, |% E- Z2 |; Z( K( Y* d' k■ PCI 2.2 compliant
0 P& P, w' O4 K) ], b: p* C■ 3.3V signaling and 3.3V I/Os
$ a! i2 K; \- P9 w5 p: L■ 33 to 66 MHz operation4 v( @% |3 u0 {; D& a3 n
■ 32-bit interface2 {2 y$ [* k7 V5 W1 ]6 i
■ Supports virtual PCI headers for GeodeLink devices
/ h% ~8 x6 |& K! x3 {( Z h$ q( TVideo Input Port (VIP)' s8 Q$ H5 m- _. g
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit, S2 @$ P) m" b: m! ]1 U8 T! T
■ Video Blanking Interval (VBI) support- `) Q# \3 ^+ I" m3 @3 M) B9 U
■ 8 or 16-bit 80 MHz SD or HD capable8 Z6 l: f* c% A& d) k% t& @
Security Block( _: d: m+ F# H6 d4 G1 F- {4 v" z! P
■ Serial EEPROM interface for 2K bit unique ID and AES
" a) F3 {5 N! J& D(Advanced Encryption Standard) hidden key storage
+ {' t, H- A. z r/ x9 Z; ^3 {(EEPROM optional inside package)
$ A# f8 C% B, W- x" v, k7 @■ Electronic Code Book (ECB) or Cipher Block Chaining# v+ S. n% O4 f
(CBC)128-bit AES hardware support
& \+ h0 V# A$ `* |■ True random number generator (TRNG) |
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