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Sponsor
# B b1 Y) \" s; U( V9 ] f4 u- QTest Technology Standards Committee of the IEEE Computer Society1 ^- E. G, P Z7 x# Q
Approved 14 June 2001
; o3 E: B, j6 `3 V4 n. NIEEE-SA Standards Board
! G4 l5 z: v2 J3 t. B3 u+ dAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
1 W. E. q. w M9 g/ Nsupport of assembled printed circuit boards is defined. The circuitry includes a standard interface. v8 l/ Y! |/ @' I
through which instructions and test data are communicated. A set of test features is defined,: M! S2 e/ Q$ Z0 v
including a boundary-scan register, such that the component is able to respond to a minimum set
1 t2 ~3 I2 \2 Sof instructions designed to assist with testing of assembled printed circuit boards. Also, a language2 T) @5 O( k* a& N2 R
is defined that allows rigorous description of the component-specific aspects of such testability features.
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Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,$ Y. y. q2 W/ j# b/ f) C
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
& v! m7 v: ?4 P8 J5 }! Z' BTAP, test, test access port, VHDL, VHSIC Hardware Description Language q$ w9 [ R2 b3 k0 w9 m
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