|
Sponsor
I' k% }: z; [6 q/ v5 U' d" D) J9 PTest Technology Standards Committee of the IEEE Computer Society& i# ~: F9 P7 [# V3 [, S2 {
Approved 14 June 2001
( \- d& L/ v& O5 A1 ?IEEE-SA Standards Board, a( ]+ Y/ |1 o) X Y6 j$ l
Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
8 c5 a' s5 }9 `1 l5 g" a; I* qsupport of assembled printed circuit boards is defined. The circuitry includes a standard interface5 c2 X2 S2 D: K$ }1 f3 _1 I7 q
through which instructions and test data are communicated. A set of test features is defined,( O4 f* b& L) g9 u
including a boundary-scan register, such that the component is able to respond to a minimum set ~" I* C, L, R$ c$ ?5 ?; l. a
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language
. u& q1 j& W) |& G+ ^0 s9 W5 B; o! l: qis defined that allows rigorous description of the component-specific aspects of such testability features.
2 \" i$ ]! \* [- P" y0 A( t: u) H' Q" O) a$ o8 J3 t: u1 a: p
Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
: q v1 r d0 hboundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
7 }% `$ E/ L+ hTAP, test, test access port, VHDL, VHSIC Hardware Description Language
9 e; s- o3 _, D+ T+ l, j6 S. r; ~8 f" q% Y
|
本帖子中包含更多資源
您需要 登錄 才可以下載或查看,沒有帳號?申請會員
x
|