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Analog / Mixed Signal Examples) F% p( t& A. _2 @
6 e4 v+ G( v: YBehavioral Models of ADCs1 y e% z# u9 ?% `1 w! ~
\ams\sampling\; sampling_101;! T. e: ^! E% M* U% Q* X
Sigma-Delta ADC 1st order modulator $ cd \ams\adc\; dspsdadc2; - ?+ R; ~5 s6 T m! [
Sigma-Delta ADC 2nd order modulator $ cd \ams\adc\; dspsdadc3;
6 I7 O) W( h1 {7 ~ Sigma-Delta ADC 2nd order modulator discrete time (switched capacitor prototype) $ cd \ams\adc\; dspsdadc4; ; h: _, } D. b5 K! h8 w: A
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Behavioral RF
% i% P0 {2 ]+ J2 T$ s2 O7 Q5 i Measurement of Lowpass Filter Freq Response $ cd feed_fwd_2;9 k4 }4 a$ r) N$ }7 r9 B) K9 k
' I- L) B4 S4 L, EPLLs 4 p2 A# G2 d* r7 u6 q
VCO with phase noise $ cd 6 S6 R2 @2 v) m2 `* j' x1 v4 n0 s
Pll with freq domain instruments $ cd \ams\pll;
9 W8 `7 t; B2 l' u" ] Pll fractional with analog compensation $ cd \ams\pll;
+ n/ ?2 h+ z' ~/ \/ e Y Pll fractional with digital compensation $ cd \ams\pll;
# T ^- _+ E1 g8 G% R* \1 E; _ Pll optimization (Nonlinear Control Design) $ cd \ams\pll;
" G4 r" a/ ^( |9 {% M0 e Carrier and Symbol Timing Recovery (NCO->ADC) $ cd \ams\pll; carrier_timing;
7 s/ z+ |7 J9 Y! c Carrier and Symbol Timing Recovery (Fractional Delay) $ cd \ams\pll; timing_recovery_1; |
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